產品資訊

BLDC ARM Cortex-M0 Line

MDF121A

  • ·                            ·                 Built-in LDO 5V output
  • ·                            ·                 Built-in 20V PN gate driver 3 sets
  • ·                            ·                  Core: Arm® Cortex®-M0 32-bit MCU, operating frequency up to 60MHz
  • ·                            ·                 Hardware divider (32-bit)
  • ·                            ·                 Up to 32KB Flash program memory
  • ·                            ·                 Up to 4KB SRAM
  • ·                            ·                  3KB independent Flash space available for program or data storage
  • ·                            ·                   Wide range operating voltage is from 2.5V 5.5V

  • ·                            ·                  Power-on reset/Power down reset (POR/PDR), programmable voltage detector (PVD)

  • ·                            ·                  Built-in 60MHz high-speed RC oscillator with factory calibration

  • ·                            ·                  40KHz LSI

  • ·                            ·                   Low power stop mode with a power consumption of 100uA

  • ·                            ·                  One 12-bit ADC (analog-to-digital converter) with conversion rate up to 1M SPS (11 input channels)

    Supports configuration of sampling time and resolution

    On-chip temperature sensor

    On-chip voltage sensor

    Conversion range: 0VDD

    Ten external channels

    Supports injection mode

    Supports multiple data buffer groups

  • ·                            ·                 Two analog comparators
  • ·                            ·                 Two rail-to-rail operational amplifiers
  • ·                            ·                 One DMA controller with 2 channels

    Supported peripherals include Timer, ADC, and USART

  • ·                            ·                 Up to 20 fast I/O ports:

    All I/O ports can be mapped to 16 external interrupts

    All ports support VDD signal input/output

  •                 ·              7 timers

    One 16-bit 4-channel advanced control timer (TIM1) with 4-channel PWM complimentary outputs and dead zone generation, hardware phase shifting, and brake functions

    One 32-bit general-purpose timer (TIM2) with up to 4 input capture/output compare channels

    Two 16-bit basic timers (TIM3, TIM4) with 1 input capture/output compare channels

    One 16-bit timer (TIM6) supporting interrupt triggering

    One independent watchdog timer

    One Systick timer with 24-bit decrementing counter

  •               ·                 Serial Wire Debug (SWD) interface to support debug mode
  •               ·                 One USART interface supporting UART and SPI communication
  •               ·                 96-bit unique chip ID (UID)
  •               ·                 Available in QFN32 packages

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