產品資訊
PCIe Gen5 Switch
MGPS50144
Performance
Maximum 144 Lanes Configuration- Peer-to-Peer Communication
- Non-Blocking Interconnection
- Support 2KB Maximum Payload Size
- Support Multicast
- Administration
- Embedded CPU for Management
- Ximple link (Support two upstream ports to connect in nontree topologies)
- Multihost and Failover
- Access Control Service (ACS)
- Dynamic Virtual Switch
- Dynamic Link-Width
- Dynamic Port Reconfiguration (DPR)
- Down Port Containment (DPC)
- Hot Plug (Surprise/Managed)
- System LED Indication
- Configuration
- Link Width Selection: x4 / x8 / x16
- Ports can be Configured as USP or DSP
- Polarity Reversal
- Lane Reversal
- Reliability, Availability and Serviceability
- Link Health
- Port Status
- Advanced Error Reporting (AER)
- ECRC and Poison Bit Support
- Eye Monitor
- Port Monitoring
- Statistic Counter
- Additional
- Management Tool for Feature Configuration, Data Analysis, and Firmware Update
- Separate Reference Clock with Independent Spread Spectrum (SRIS）
- Boot ROM
- Support for SPI flash
- Peripheral Interface includes I2C, UART, JTAG and GPIOs
- Package Types
- FCBGA
