產品資訊

82 SERIES

MG82F5B32

  • * 1-T 80C51 Central Processing Unit
  • * MG82F5B32 with 32K Bytes flash ROM
    • *ISP memory zone could be optioned as 0.5KB/1.0KB~7.5KB
    • *Flexible IAP size by software configured
    • *Code protection for flash memory access
    • *Flash erase/program cycle: 20,000 times
    • *Flash data retention: 100 years at 25℃
    • *Default MG82F5B32 Flash space mapping
      AP Flash default mapping 29.5KB 0000h~75FFh
      IAP Flash default mapping 1.0KB 7600h~79FFh
      ISP Flash default mapping 1.5KB 7A00h~7FFFh,Flash default mapping
  • * Data RAM : 2K bytes
    • *On-chip 256 bytes scratch-pad RAM
    • *1792 bytes expanded RAM (XRAM)
  • * Dual data pointer
  • * Interrupt controller
    • *16 sources, four-level-priority interrupt capability
    • *Four external interrupt inputs, nINT0, nINT1, nINT2 and nINT3, with glitch filter
    • *All external interrupts support High/Low level or Rising/Falling edge trigger
  • * Three 16-bit timer/counters, Timer 0, Timer 1 and Timer 2
    • *T0CKO on P34, T1CKO on P35 and T2CKO on P10
    • *X12 mode enabled for T0/T1/T2
    • *S1BRG cascaded with Timer 1 to a 16/24-bit timer/counter
  • * Programmable 16-bit counter/timer Array (PCA) with 8 compare/capture modules
    • *Reloadable 16-bit base counter to support variable length PWM
    • *Up to 100MHz clock source from on-chip CKM
    • *Capture mode, 16-bit software timer mode and High speed output mode
    • *PWM module with dead-time control, break control and central-aligned option
    • *Variable 8/10/12/16-bit PWM mode with phase shift function, can be configured to:
      Up to 8 channels un-buffered 16-bit PWM, or
      Up to 8 channels buffered 8-bit PWM, or
      Up to 4 channels buffered 16-bit PWM
  • * Keypad Interrupt
  • * 10/12-Bit Single-ended ADC
    • *Programmable throughput up to 400K sps
    • *Up to 8 channel external inputs and four channel internal input (IVR24/AVSS/0.5VDD)
    • *ADC VREF+ from on-chip 2.4V reference (IVR24), default from VDD
  • * Enhanced UART (S0)
    • *Framing Error Detection
    • *Automatic Address Recognition
    • *Speed improvement mechanism (X2/X4 mode), Max. UART baud rate up to 3.68/ 6MHz
    • *Support SPI Master in Mode 4, up to 12MHz on SPICLK
  • * Secondary UART (S1)
    • *Max. UART baud rate up to 1.8432/3.0MHz
    • *Support SPI Master in Mode 4, up to 12MHz on SPICLK
    • *Support LIN bus protocol in Mode 5
    • *Support SCI (Smart-Card interface, ISO-7816) in Mode 7
  • * One Master/Slave SPI serial interface
    • *Max. 24MHz SPICLK on SPI master
    • *Max 12MHz on SPI slave
    • *Support daisy-chain function in SPI slave mode
    • *Up to 3 SPI masters including S0 and S1 in mode 4
  • * Three two-wire-serial-interfaces: TWI0/I2C0, TWI1/I2C1 and STWI/SI2C(SID)
    • *Two Master/Slave hardware engine: TWI0/I2C0 and TWI1/I2C1
    • *Max. 1MHz on I2C0/I2C1 master mode and Max. 400KHz on I2C0/I2C1 slave mode
    • *One software TWI/I2C, STWI/ SI2C, Start/Stop serial interface detection (SID)
  • * Programmable Watchdog Timer, clock sourced from ILRCO
    • *One time enabled by CPU or power-on
    • *Interrupt CPU or Reset CPU on WDT overflow
    • *Support WDT function in power down mode (watch mode) for auto-wakeup function
  • * Real-Time-Clock module, clock source from XTAL, ILRCO or SYSCLK
    • *0.5S ~ 64S programmable interrupt period
    • *21-bit length system timer
  • * Beeper function
  • * On-Chip-Debug interface (OCD)
  • * Maximum 29 GPIOs in 32-pin package
    • *P3 can be configured to quasi-bidirectional, push-pull output, open-drain output and input only
    • *P1, P2, P4 and P6 can be configured to open-drain output or push-pull output
    • *P6.0, P6.1 and P4.7 shared with XTAL2, XTAL1 and RST
  • * Clock Sources
    • *Internal 12MHz/11.059MHz oscillator (IHRCO): factory calibrated to ±1%, typical
    • *External crystal mode, support 32.768KHz oscillating and missing clock detection (MCD)
    • *Internal Low power 32KHz RC Oscillator (ILRCO)
    • *External clock input (ECKI) on P6.0/XTAL2, up to 25MHz
    • *Internal Oscillator output on P6.0/XTAL2
    • *On-chip Clock Multiplier (CKM) to provide high speed clock source (96MHz)
  • * Two Brown-Out Detectors
    • *BOD0: detect 1.7V
    • *BOD1: selected detection level on 4.2V/3.7V/2.4V/2.0V
    • *Interrupt CPU or reset CPU
    • *Wake up CPU in Power-Down mode (BOD1)
  • * Multiple power control modes: idle mode, power-down mode, slow mode, sub-clock mode, RTC mode, watch mode and monitor mode.
    • *All interrupts can wake up IDLE mode
    • *11 sources to wake up Power-Down mode
    • *Slow mode and sub-clock mode support low speed MCU operation
    • *RTC mode supports RTC to resume CPU in power down mode
    • *Watch mode supports WDT to resume CPU in power down
    • *Monitor mode supports BOD1 to resume CPU in power down
  • * Operating voltage range: 1.8V – 5.5V
    • *Minimum 1.8V requirement in flash write operation (ISP/IAP/ICP)
  • * Operating frequency range: 32MHz(max)
    • *External crystal mode, 0 – 12MHz @ 2.0V – 5.5V and 0 – 25MHz @ 2.4V – 5.5V
    • *CPU up to 12MHz @ 1.8V – 5.5V, up to 25MHz @ 2.2V – 5.5V
    • *CPU up to 32MHz @ 2.7V – 5.5V with on-chip CKM
  • * 16-Bytes Unique ID code
  • * Operating Temperature:
    • *Industrial (-40℃ to +105℃)*
  • * Package Types:
    • *SSOP20:MG82F5B32AL20
    • *SOP28:MG82F5B32AS28
    • *LQFP32(7mm *7mm):MG82F5B32AD32

Note*: Tested by sampling.

Document

DataSheet - 8051 MCU

Support

Sample Code - 8051 MCU

Develop Tools - 8051 series

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