產品資訊
80C51 Central Processing Unit
On-chip program memory : MPC89E/L51(4KB),MPC89E/L52(8KB),MPC89E/L53(15KB),MPC89E/L54(16KB) MPC89E/L58(32KB),MPC89E/L515(63KB)
IAP space:
MPC89x51 10KB shared with ISP
MPC89x52 6KB shared with ISP
MPC89x53 none.
MPC89x54 46KB shared with ISP
MPC89x58 30KB shared with ISP
MPC89x515 none.
Note: User must enable ISP function to enable IAP at same time
ISP capability; optional 1KB/2KB/4KB ISP memory , MPC89x53/515 shared with application flash memory. MPC89x51/52/54/58 shared with IAP flash memory
On-Chip 256 bytes scratch-pad RAM and MPC89x51/52/53(256Byte),MPC89x54/58/515(1024Byte) auxiliary RAM; Be capable of addressing up to 64 K bytes external memory
MOVC-disabling, encrypting, and locking flash memory realize security mechanism
Three 16-bits timer/counter, Timer2 is an up/down counter with programmable clock output on P1.0
Eight sources, four-level-priority interrupt capability
Enhanced UART, provides frame-error detection and hardware address-recognition
Dual DPTR for fast-accessing of data memory
15 bits Watch-Dog-Timer with 8-bit pre-scalar, one-time enabled
Power control: Idle mode and Power-Down mode; Power-Down can be woken-up by P3.2/P3.3/P4.2/P4.3
Low EMI: inhibit ALE emission
Four 8-bit bi-directional ports; extra four-bit additional P4 are available
On-Chip flash program/data memory:
The data endurance of the embedded flash gets over 20,000 times
Greater than 100 years data rentention under room temperature
Operating Voltage:
4.5V~5.5V for MPC89E51/52/53/54/58/515A
2.4V~3.6V for MPC89L51/52/53/54/58/515A, minimum 2.7V requirement in flash write operation (ISP/ICP/..)
Built-in Low-Voltage-Reset circuit
Operating Temperature: Industrial (-40°C to +85°C)*
Maximum Operating Frequency:
Optional 12T or 6T mode
Up to 48MHz@12T or 24MHz@6T, Industrial range
Three package types:
PDIP 40: MPC89x51/52/53/54/58/515AE
LQFP 44: MPC89x51/52/53/54/58/515AD44
- (*): Tested by sampling
