產品資訊

82 SERIES

MG82F6D64

  • *1-T 80C51 Central Processing Unit
  • *MG82F6D64/32 with 64K/32K Bytes flash ROM
    • *ISP memory zone could be optioned as 0.5KB/1.0KB~7.5KB
    • *Flexible IAP size by software configured
    • *Code protection for flash memory access
    • *Flash write/erase cycle: 20,000
    • *Flash data retention: 100 years at 25°C
    • *Default MG82F6D64 Flash space mapping
      • *AP Flash default mapping (61.5KB, 0000h~F5FFh)
      • *IAP Flash default mapping (1.0KB, F600h~F9FFh)
      • *ISP Flash default mapping (1.5KB, FA00h~FFFFh), ISP Boot code
    • *Default MG82F6D32 Flash space mapping
      • *AP Flash default mapping (29.5KB, 0000h~75FFh)
      • *IAP Flash default mapping (1.0KB, 7600h~79FFh)
      • *ISP Flash default mapping (1.5KB, 7A00h~7FFFh), ISP Boot code
  • *Data RAM :
    • *On-chip 256 bytes scratch-pad RAM
    • *MG82F6D64 - 3840 bytes expanded RAM (XRAM)
    • *MG82F6D32 - 1792 bytes expanded RAM (XRAM)
    • *Support page select on XRAM access
  • *Dual data pointer
  • *External Memory Bus interface (EMB)
    • *Only support No Address mode access (LCD 8080 I/F)
  • *Provide one channel DMA engine
    • *P2P, M2P, P2M
    • *Memory target: on-chip XRAM & EMB
    • *Peripheral target: UART0/1/2/3, SPI, TWI0/I2C0, I2C1, ADC12, EMB & CRC16
    • *Timer 5 and Timer 6 are used for DMA, but it also can be traded as independent timer when DMA not in use
  • *Interrupt controller
    • *24 sources, four-level-priority interrupt capability
    • *Four external interrupt inputs, nINT0, nINT1, nINT2 and nINT3 with glitch filter
    • *All external interrupts support High/Low level or Rising/Falling edge trigger
  • *Total 14/ 17(with split mode) timers in MG82F6D64, and total 13/15(with split mode) timers in MG82F6D32
    • *RTC Timer and WDT Timer
    • *Timer 0~4 (Timer 4 not supported by MG82F6D32)
    • *PCA0, Program Counter Array 0
    • *S0 BRG, S1 BRG, S2 BRG and S3 BRG
    • *Timer 2/3/4 in split mode, MG82F6D64 has total 17 timers, MG82F6D32 has total 15 timers
    • *Timer 5/6 of DMA module can also be used as timer
  • * 7 16-bit timer/counters, Timer 0, Timer 1, Timer 2, Timer 3, Timer 4 (Timer 4 not support by MG82F6D32) , Timer 5, Timer 6
    • *X12 mode and timer clock output function
    • *Synchronous control of Run-Enable, Stop and Reload on Timer 0~4
    • *New 5 operating modes in Timer 2/3/4 with 8 clock sources and 8 capture sources
    • *Timer 2/3/4 can be split to two 8-bit timers
    • *Clock Count Output (CCO) on T2CKO, T3CKO and T4CKO (T4CKO not support by MG82F6D32
    • *Timer 0~4 support PWM mode
    • *Timer 2/3/4 support Duty Capture function
  • *One Programmable 16-bit counter/timer Arrays (PCA0) with 8 Compare/PWM modules
    • *PCA0 has 6 CCP (Capture/Compare/PWM) modules and 2 CP (Compare/PWM) modules
    • *Reloadable 16-bit base counter to support variable length PWM
    • *Up to 144 MHz clock source from on-chip CKM
    • *Capture mode, 16-bit software timer mode and High speed output mode
    • *Buffered capture mode to monitor narrow pulse input
    • *Variable 8/10/12/16-bit PWM mode, the PCA can be configured to:
      • *Up to 8 channels un-buffered 10/12/16-bit PWM
      • *Up to 8 channels buffered 2~8-bit PWM
      • *Up to 4 channels buffered 9~16-bit PWM
    • *PCA0 PWM module 0~5 with dead-time control, break control and central-aligned option
    • *8 Inputs Keypad Interrupt (KBI)
    • *Output signal Break & Modulator 0/1 (OBM0/1)
      • *Multi-source modulator and selectable carrier source
      • *Support fast Event Break function
    • *12-Bit Single-ended ADC
      • *Programmable throughput up to 1.2M sps
      • *MG82F6D64 has 16 channel external inputs and 2 channels for internal reference voltage (IVR/1.4V) and internal VSS
      • *MG82F6D32 has 10 channel external inputs and 2 channels for internal reference voltage (IVR/1.4V) and internal VSS
      • *Support window detect function on ADC result
      • *Support channel scan mode
      • *ADC VREF+ from external input
    • *Analog Comparator 0
      • *Selectable internal voltage reference (IVR/1.4V) on ACNI0
      • *4 selectable ACPI0 (+) inputs
      • *Wake-up from power-down and idle
      • *Glitch filter option and output to internal timer capture
    • *Analog Comparator 1/2 (Analog Comparator 2 not support by MG82F6D32)
      • *Selectable internal voltage reference (IVR/1.4V) on ACNI1/ACNI2
      • *Wake-up from power-down and idle
      • *Glitch filter option and output to internal timer capture
    • *Enhanced UART (S0)
      • *Framing Error Detection
      • *Automatic Address Recognition
      • *Max. UART baud rate up to 3.6864MHz / 6MHz
      • *Support SPI Master Mode 4, up to 12MHz on SPICLK
      • *Built-in baud rate generator (S0BRG)to support TX or RX on different baud rate
      • *Support LIN bus protocol with auto baud rate detection (mode 5)
      • *S0BRG cascaded with Timer 0/1 as 16/24-bit timer/counter
    • *2nd/3rd/4th UART (S1/S2/S3)(S2/S3 not support by MG82F6D32)
      • *Max. UART baud rate up to 1.8432 / 3.0MHz
      • *Support SPI Master Mode 4, up to 12MHz on SPICLK
    • *One Master/Slave SPI serial interface
      • *Max. 24MHz SPICLK on SPI master
      • *Max 12MHz on SPI slave
      • *QPI mode support
      • *Up to 5 SPI masters including S0/S1/S2/S3 (Mode 4)
      • *Support daisy-chain in SPI slave mode
    • *Three Master/Slave two wire serial interfaces: TWI0/I2C0, TWI1/I2C1 and STWI (SI2C)
      • *Two Master/Slave hardware engine: TWI0/I2C0 and TWI1/I2C1
      • *Max. 1MHz on I2C0/I2C1 master mode and Max. 400KHz on I2C0/I2C1 slave mode
      • *One software TWI/I2C, STWI/ SI2C, Start/Stop serial interface detection (SID)
      • *Multiple slave address recognition on I2C0/I2C1
    • *Programmable Watchdog Timer (WDT)clock sourced from ILRCO, XTAL or SYSCLK/12
      • *Clock source: ILRCO, XTAL or SYSCLK/12
      • *One-time enabled by CPU or power-on
      • *One-time enabled by CPU or power-on
    • *Watchdog Timer (WDT) Additional Features
      • *Interrupt CPU or Reset CPU on WDT overflow
      • *Support WDT function in power down mode (watch mode) for auto-wakeup function
    • *Real-Time-Clock (RTC) Module
      • *Clock source: XTAL, ILRCO, WDTPS, WDTOF, SYSCLK or SYSCLK/12
      • *Programmable interrupt period from millisecond to minute wakeup
      • *21-bit length system timer
    • *Beeper Function
    • *General Purpose Logic (GPL/CRC)
      • *Bit order reversed function
      • *16-bit CRC engine (CCITT-16 polynomial)
      • *Support automatic CRC of flash content
      • *Programmable initial seed function of CRC
    • *On-Chip-Debug Interface (OCD)
    • *Maximum 59/44/29 GPIOs in 64/48/32-pin package
      • *P3 configurable: quasi-bidirectional, push-pull, open-drain or input only
      • *P0, P1, P2, P4, P5, P6, P7 configurable: open-drain or push-pull
      • *P6.0, P6.1 and P4.7 shared with XTAL2, XTAL1 and RST
      • *Programmable GPIO driving strength and speed
      • *On-chip pull-up enabled on each pin
    • *Clock Sources
      • *Internal 12MHz/11.059MHz oscillator (IHRCO), factory calibrated ±1%
      • *External crystal mode, supports 32.768KHz and Missing Clock Detection (MCD)
      • *Internal low power 32KHz RC oscillator (ILRCO)
      • *External clock input (ECKI) on P6.0/XTAL2 up to 25MHz
      • *Internal RC oscillator output on P6.0/XTAL2
      • *On-chip Clock Multiplier (CKM) up to 144MHz / 96MHz
    • *Two Brown-Out Detectors
      • *BOD0: detect 1.7V
      • *BOD1 selectable levels: 4.2V / 3.7V / 2.4V / 2.0V
      • *Interrupt CPU or reset CPU
      • *Wake up CPU in Power-Down mode (BOD1)
    • *Multiple power control modes: idle mode, power-down mode, slow mode, sub-clock mode, RTC mode, watch mode and monitor mode.
      • *All interrupts wake up IDLE mode
      • *19 sources with 23 pins wake up Power-Down mode
      • *Slow mode and sub-clock mode support low speed MCU operation
      • *RTC mode supports RTC to resume CPU in power down
      • *Watch mode supports WDT to resume CPU in power down
      • *Monitor mode supports BOD1 to resume CPU in power down
    • *Operating voltage range: 1.8V – 5.5V
      • *Minimum 1.8V for flash write (ISP/IAP/ICP)
    • *Operation frequency range: 36MHz (max)
      • *External clock: 0–12MHz @2.0–5.5V, 0–25MHz @2.4–5.5V
      • *CPU up to 12MHz @1.8–5.5V, 25MHz @2.2–5.5V
      • *CPU up to 36MHz @2.7–5.5V with CKM
    • *16-Bytes Unique ID Code
    • *Operating Temperature
      • *Industrial grade (-40°C to +105°C)*
    • *Package Types
      • *LQFP64 (7x7mm): MG82F6D64AD64 (64KB)
      • *LQFP48 (7x7mm): MG82F6D64AD48 (64KB), MG82F6D32AD48 (32KB)
      • *QFN48 (6x6x0.75mm): MG82F6D64AY48 (64KB), MG82F6D32AY48 (32KB)
      • *LQFP32 (7x7mm): MG82F6D32AD32 (32KB)
      • *QFN32 (4x4x0.55mm): MG82F6D32AZ32 (32KB)
      • *SSOP20 (150mil): MG82F6D64AL20 (64KB)
      • * Tested by sampling

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