產品資訊

• 1-T 80C51 Central Processing Unit
  • Stack Pointer warning indicator

• MG82F6B001 with 8K Bytes flash ROM & 512 Bytes EEPROM
  • ISP memory zone could be optioned as 0.5KB/1.0KB~3.5KB
  • 512 Bytes EEPROM write/erase cycle: 100,000
  • Flexible IAP size by software configured
  • Code protection for Flash memory access
  • Flash write/erase cycle: 20,000
  • Flash data retention: 100 years at 25℃
  • Default MG82F6B001 Flash space mapping

    AP Flash default mapping	6.5KB 0000h~19FFh
    IAP Flash default mapping	Disable
    ISP Flash default mapping	1.5KB 1A00h~1FFFh, ISP Boot code

• Data RAM : 1K Bytes
  • On-chip 256 bytes scratch-pad RAM
  • 768 bytes expanded RAM (XRAM)
  • Support page select on XRAM access
•  Dual data pointer
• Interrupt controller
  • 12 sources, four-level-priority interrupt capability
  • Two external interrupt inputs, nINT0, nINT1 with glitch filter
  • All external interrupts support High/Low level or Rising/Falling edge trigger
• Total 7/8 (with split mode) timers in MG82F6B001
  • RTC Timer and WDT Timer
  • Timer 0, Timer 1, Timer 2
  • PCA0, Program Counter Array 0
  • S0 BRG
  • If Timer 2 in split mode, MG82F6B001 has total 8 timers
• Three 16-bit timer/counters, Timer 0, Timer 1 and Timer 2
  • Synchronous control of Run-Enable, Stop and Reload on Timer 0~2
  • New 6 operating modes in Timer 2 with 8 clock sources and 8 capture sources
  • Timer 2 can be split to two 8-bit timers
  • Clock Count Output (CCO) on T2CKO
  • Timer 0~2 support PWM mode
  • Timer 2 support Duty Capture function
• One Programmable 16-bit counter/timer Arrays (PCA0) with 4 Compare/PWM modules
  • PCA0 has 4 CCP (Capture/Compare/PWM) modules
  • Reloadable 16-bit base counter to support variable length PWM
  • Capture mode, 16-bit software timer mode and High speed output mode
  • Buffered capture mode to monitor narrow pulse input
  • Support POEM0
  • Variable 8/10/12/16-bit PWM mode, the PCA can be configured to:

    Up to 4 channels un-buffered 10/12/16-bit PWM, or

    Up to 4 channels buffered 2~8-bit PWM, or

    Up to 2 channels buffered 9~16-bit PWM

  • PCA0 PWM module 0~3 with dead-time control, break control and central-aligned option
• 8 Inputs Keypad Interrupt (KBI)
• 10-Bit Single-ended ADC
  • Programmable throughput up to 666K sps
  • MG82F6B001 has 6 channel external inputs and 2 channel for internal reference voltage (IVR/1.4V) and internal VSS
  • Support window detect function on ADC result
• On-chip voltage reference (IVR14)
• Analog Comparator 0
  • Selectable internal voltage reference (IVR/1.4V) on ACNI0
  • Wake-up from power-down and idle
  • Glitch filter option and output to internal timer capture
• Enhanced UART (S0)
  • Framing Error Detection
  • Automatic Address Recognition
  • Max. UART baud rate up to 2MHz
  • Support SPI Master in Mode 4, up to 4MHz on SPICLK
  • Built-in baud rate generator (S0BRG) to support TX or RX on different baud rate
  • Support LIN bus protocol with auto baud rate detection in mode 5
• One Master/Slave SPI serial interface
  • Up to 2 SPI masters including S0 in mode 4
  • Support daisy-chain function in SPI slave mode
• Two Master/Slave two wire serial interfaces: TWI0/I2C0 and STWI (SI2C)
  • One Master/Slave hardware engine: TWI0/I2C0
  • Max. 1MHz on I2C0 master mode and Max. 400KHz on I2C0 slave mode
  • One software TWI/I2C, STWI/SI2C, Start/Stop serial interface detection (SID)
  • Multiple slave address recognition on I2C0
• Programmable Watchdog Timer (WDT), clock sourced from ILRCO or SYSCLK/12
  • One time enabled by CPU or power-on
  • Interrupt CPU or Reset CPU on WDT overflow
  • Support WDT function in power down mode (watch mode) for auto-wakeup function
• Real-Time-Clock (RTC) module, clock sourced from ECKI, ILRCO, WDTPS, WDTOF, SYSCLK or SYSCLK/12
  • Programmable interrupt period from mini-second wakeup to minute wakeup
  • 21-bit length system timer
• Beeper function
• General purpose logic (GPL/CRC)
  • Bit order reversed function
  • 16-bit CRC engine (CCITT-16 polynomial)
  • Support automatic CRC of Flash content
  • Programmable initial seed function of CRC
• On-Chip-Debug interface (OCD)
• Maximum 8/6 GPIOs in 10/8-pin package
  • P3 can be configured to quasi-bidirectional, push-pull output, open-drain output and input only
  • P1 and P4 can be configured to open-drain output or push-pull output
  • P4.7 shared with RST
  • Programmable GPIO driving strength and driving speed
  • On chip pull-up enabled on each pin
• Clock Sources
  • Internal 16MHz/22.12MHz oscillator (IHRCO): factory calibrated to ±1%, typical
  • Internal Low power 32KHz RC Oscillator (ILRCO)
  • External clock input (ECKI) on P4.5 up to 24MHz
  • Internal RC Oscillator output on P4.5
• Two Brown-Out Detectors
  • BOD0: detect 2.35V
  • BOD1: selected detection level on 4.2V/3.6V/2.4V/2.7V
  • Interrupt CPU or reset CPU
  • Wake up CPU in Power-Down mode (BOD1)
• Multiple power control modes: idle mode, power-down mode, slow mode, sub-clock mode, RTC mode, watch mode and monitor mode.
  • All interrupts can wake up IDLE mode
  • 10 sources with 6 (SOP8) pins to wake up Power-Down mode
  • Slow mode and sub-clock mode support low speed MCU operation
  • RTC mode supports RTC to resume CPU in power down
  • Watch mode supports WDT to resume CPU in power down
  • Monitor mode supports BOD1 to resume CPU in power down
• Operating voltage range: 2.4V – 5.5V
• Operating frequency range: 22.12MHz(max)
  • SYSCLK up to 24MHz@ 2.4V – 5.5V
  • CPU up to 12MHz @ 2.4V – 5.5V, and 0 –16MHz@ 2.7V – 5.5V
• 16-Bytes Unique ID code
• Operating Temperature:
  • Industrial (-40℃ to +85℃)*

• Package Types:
  • SOP8: MG82F6B001AS8 (8K)

Note*: Tested by sampling.