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MEGAWIN Products
8051 MCU
1T 8051 MCU
*
82 SERIES
MG82FG5C64
  • * 1-T 80C51 Central Processing Unit
  • * MG82FG5C64 with 64K Bytes flash ROM
    • *ISP memory zone could be optioned as 0.5/1.0KB~7.5KB
    • *Flexible IAP size by software configured
    • *Code protection for flash memory access
    • *Flash erase/program cycle: 10,000 times
    • *Flash data retention: 100 years at 25℃
    • *Default MG82FG5C64 Flash space mapping
      AP 60KB 0000h~EFFFh
      IAP 2.5KB F000h~F9FFh
      ISP 1.5KB FA00h~FFFFh
  • * Data RAM : 4K / 2K Bytes
    • *On-chip 256 bytes scratch-pad RAM
    • *3840/1792 bytes expanded RAM (XRAM)
  • * Dual data pointer
  • * Variable length MOVX for slow SRAM/Peripherals
    • *Support 16-bit data read/write on MOVX cycle
    • *No Address mode access (FIFO mode)
  • * Interrupt controller
    • *24 sources, four-level-priority interrupt capability
    • *Four external interrupt inputs, nINT0, nINT1, nINT2 and nINT3, with glitch filter
    • *All external interrupts support High/Low level or Rising/Falling edge trigger
  • * Total 12 timers
    • *RTC Timer and WDT Timer
    • *Timer 0, Timer 1, Timer 2, Timer 3 and Timer 4
    • *S1BRG, S2BRG and S3BRG
    • *PCA0 and PCA1
    • *If Timer 2/3/4 in split mode, total 15 timers
  • * Five 16-bit timer/counters, Timer 0, Timer 1, Timer 2, Timer 3 and Timer 4
    • *X12 mode and timer clock output function
    • *Synchronous Run-Enable on all timer (same function on Stop and Reload)
    • *New 4 operating modes in Timer 2/3/4 with 8 clock sources and 8 capture sources
    • *Timer 2/3/4 can be split to two 8-bit timers
    • *Clock Count Output (CCO) on T2CKO, T3CKO and T4CKO
    • *S1/S2/S3BRG cascaded with Timer 1 to a 32/40-bit timer/counter
  • * Two Programmable 16-bit counter/timer Arrays (PCA0 and PCA1) with 12 CCP modules
    • *Each PCA has 6 CCP (Capture/Compare/PWM) modules
    • *Reloadable 16-bit base counter to support variable length PWM
    • *Up to 100MHz clock source from on-chip CKM
    • *Capture mode, 16-bit software timer mode and High speed output mode
    • *Buffered capture mode to monitor narrow pulse input
    • *Variable 8/10/12/16-bit PWM mode with phase shift function
    • *Variable 8/10/12/16-bit PWM mode with phase shift function, each PCA can be configured to:
      Up to 6 channels un-buffered 16-bit PWM, or
      Up to 6 channels buffered 8-bit PWM, or
      Up to 3 channels buffered 16-bit PWM
  • *PCA0 PWM module with dead-time control, Break control and central-aligned option
  • * Keypad Interrupt (P0/P2/P5/P3+P4)
  • * 10-Bit Single-ended ADC
    • *Programmable throughput up to 500K sps
    • *16 channel external inputs
    • *ADC VREF+ from external input
  • * Analog Comparator 0
    • *Programmable on-chip voltage reference, shared to analog comparator 1/2
    • *4 selectable AIN0(+) inputs
    • *Wake-up from power-down and idle
    • *Glitch filter option and output to internal timer capture
  • * Analog Comparator 1/2
    • *Wake-up from power-down and idle
    • *Glitch filter option and output to internal timer capture
  • * Enhanced UART (S0)
    • *Framing Error Detection
    • *Automatic Address Recognition
    • *Speed improvement mechanism (X2/X4 mode), Max. UART baud rate up to 7.3728/12.0MHz
    • *Support SPI Master in Mode 4, up to 12MHz on SPICLK
  • * 2nd/3rd/4th UARTs (S1/S2/S3)
    • *Each UART has dedicated Baud Rate Generator
    • *S1 shares baud rate generator to S0
    • *8-bit timer function on each module, cascaded with Timer 1 to be a 32/40-bit timer/counter
    • *Max. UART baud rate up to 1.8432/3.0MHz
    • *Support SPI master mode in Mode 4, up to 12MHz on SPICLK
    • *S1 support LIN bus protocol in Mode 5
    • *S1/S2/S3 support SCI (Smart Card Interface, ISO-7816) in Mode 7
  • * One Master/Slave SPI serial interface
    • *Max. 12MHz on SPICLK
    • *Quad Peripheral Interface (QPI) available
    • *8/16 bits data transfer
    • *Up to 5 SPI masters including S0~S3 in mode 4
  • * Three Master/Slave two wire serial interfaces: TWSI, TWI1 and STWI (SID)
    • *Two Master/Slave hardware engine: TWSI and TWI1
    • *3 device addresses recognized in TWSI/TWI1 slave mode
    • *Two wire Start/Stop serial interface detection (SID) for STWI, Software TWI
  • * Programmable Watchdog Timer, clock sourced from ILRCO
    • *One time enabled by CPU or power-on
    • *Interrupt CPU or Reset CPU on WDT overflow
    • *Support WDT function in power down mode (watch mode) for auto-wakeup function
  • * Real-Time-Clock (RTC) module, clock sourced from XTAL or ILRCO
    • *Programmable interrupt period from mini-second wakeup to monthly wakeup
    • *21-bit length system timer
  • * Beeper function
  • * On-Chip-Debug interface (OCD)
  • * Maximum 59 GPIOs in LQFP64 package
    • *P3 can be configured to quasi-bidirectional, push-pull output, open-drain output and input only
    • *P0, P1, P2, P4, P5, P6 and P7 can be configured to open-drain output or push-pull output
    • *P6.0, P6.1 and P4.7 shared with XTAL2, XTAL1 and RST
  • * Clock Sources
    • *Internal 12MHz/11.059MHz oscillator (IHRCO): factory calibrated to ±1%, typical
    • *External crystal mode, support 32.768KHz oscillating
    • *Internal Low power 32KHz RC Oscillator (ILRCO)
    • *External clock input (ECKI) on P6.0/XTAL2, up to 25MHz
    • *Internal RC Oscillator output on P6.0/XTAL2
    • *On-chip Clock Multiplier (CKM) to provide high speed clock source
  • * Two Brown-Out Detectors
    • *BOD0: detect 1.7V
    • *BOD1: selected detection level on 4.2V/3.7V/2.4V/2.0V
    • *Interrupt CPU or reset CPU
    • *Wake up CPU in Power-Down mode (BOD1)
  • * Multiple power control modes: idle mode, power-down mode, slow mode, sub-clock mode, RTC mode, watch mode and monitor mode.
    • *All interrupts can wake up IDLE mode
    • *13 sources to wake up Power-Down mode
    • *Slow mode and sub-clock mode support low speed MCU operation
    • *RTC mode supports RTC to resume CPU in power down
    • *Watch mode supports WDT to resume CPU in power down
    • *Monitor mode supports BOD1 to resume CPU in power down
  • * Operating voltage range: 1.8V – 5.5V
    • *Minimum 1.8V requirement in flash write operation (ISP/IAP/ICP)
  • * Operation frequency range: 25MHz(max)
    • *External crystal mode, 0 – 12MHz @ 2.0V – 5.5V, 0 – 25MHz @ 2.7V – 5.5V
    • *CPU up to 12MHz @ 1.8V – 5.5V, and up to 25MHz @ 2.2V – 5.5V
  • * Operating Temperature:
    • *Industrial (-40°C to +85°C)*

Note*: Tested by sampling.

  • * Data Sheet *
  • * Package Dimension *

  • Tools
  • * Megawin 8051 Writer U1 *
  • * Megawin 8051 ISP/ICP Programmer *
  • * Megawin 8051 COM Port ISP *
  • * Megawin 8051 OCD ICE *
  • Reference
  • * EV Board *
  • * ISP via COM *