MG32L003 Standard Peripherals Firmware Library
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Data Fields | |
__IOM uint32_t | RLOAD |
__IOM uint32_t | CR |
__IOM uint32_t | INTEN |
__IOM uint32_t | SR |
__IOM uint32_t | INTCLR |
__IOM uint32_t | CNTVAL |
__IOM uint32_t CNTVAL |
WWDG count value register, Address offset: 0x014
__IOM uint32_t CR |
WWDG control register, Address offset: 0x004
__IOM uint32_t INTCLR |
WWDG Interrupt clear register, Address offset: 0x010
__IOM uint32_t INTEN |
WWDG interrupt enable register, Address offset: 0x008
__IOM uint32_t RLOAD |
WWDG count reload register, Address offset: 0x000
__IOM uint32_t SR |
WWDG interrupt status register, Address offset: 0x00C