MG32L003 Standard Peripherals Firmware Library
Macros
PCA_Clock_Source_Selection

Macros

#define PCA_CLOCK_SOURCE_PCLKDIV32   0x00000000U
 
#define PCA_CLOCK_SOURCE_PCLKDIV16   (PCA_MOD_CPS_0)
 
#define PCA_CLOCK_SOURCE_PCLKDIV8   (PCA_MOD_CPS_1)
 
#define PCA_CLOCK_SOURCE_PCLKDIV4   (PCA_MOD_CPS_1 | PCA_MOD_CPS_0)
 
#define PCA_CLOCK_SOURCE_PCLKDIV2   (PCA_MOD_CPS_2)
 
#define PCA_CLOCK_SOURCE_TIM10_OVERFLOW   (PCA_MOD_CPS_2 | PCA_MOD_CPS_0)
 
#define PCA_CLOCK_SOURCE_TIM11_OVERFLOW   (PCA_MOD_CPS_2 | PCA_MOD_CPS_1)
 
#define PCA_CLOCK_SOURCE_ECI   (PCA_MOD_CPS_2 | PCA_MOD_CPS_1 | PCA_MOD_CPS_0)
 
#define IS_PCA_CLOCK_COURCE(CLOCK_SOURCE)
 

Detailed Description

Macro Definition Documentation

◆ IS_PCA_CLOCK_COURCE

#define IS_PCA_CLOCK_COURCE (   CLOCK_SOURCE)
Value:
(((CLOCK_SOURCE) == PCA_CLOCK_SOURCE_PCLKDIV32) || ((CLOCK_SOURCE) == PCA_CLOCK_SOURCE_PCLKDIV16) || \
((CLOCK_SOURCE) == PCA_CLOCK_SOURCE_PCLKDIV8) || ((CLOCK_SOURCE) == PCA_CLOCK_SOURCE_PCLKDIV4) || \
((CLOCK_SOURCE) == PCA_CLOCK_SOURCE_PCLKDIV2) || ((CLOCK_SOURCE) == PCA_CLOCK_SOURCE_TIM10_OVERFLOW) || \
((CLOCK_SOURCE) == PCA_CLOCK_SOURCE_TIM11_OVERFLOW) || ((CLOCK_SOURCE) == PCA_CLOCK_SOURCE_ECI))
#define PCA_CLOCK_SOURCE_PCLKDIV16
Definition: mg32l003_pca.h:87
#define PCA_CLOCK_SOURCE_TIM11_OVERFLOW
Definition: mg32l003_pca.h:92
#define PCA_CLOCK_SOURCE_PCLKDIV32
Definition: mg32l003_pca.h:86
#define PCA_CLOCK_SOURCE_PCLKDIV4
Definition: mg32l003_pca.h:89
#define PCA_CLOCK_SOURCE_PCLKDIV8
Definition: mg32l003_pca.h:88
#define PCA_CLOCK_SOURCE_TIM10_OVERFLOW
Definition: mg32l003_pca.h:91
#define PCA_CLOCK_SOURCE_ECI
Definition: mg32l003_pca.h:93
#define PCA_CLOCK_SOURCE_PCLKDIV2
Definition: mg32l003_pca.h:90

◆ PCA_CLOCK_SOURCE_ECI

#define PCA_CLOCK_SOURCE_ECI   (PCA_MOD_CPS_2 | PCA_MOD_CPS_1 | PCA_MOD_CPS_0)

Specify ECI as pca input clock source

◆ PCA_CLOCK_SOURCE_PCLKDIV16

#define PCA_CLOCK_SOURCE_PCLKDIV16   (PCA_MOD_CPS_0)

Specify PCLK divider 16 as pca input clock source

◆ PCA_CLOCK_SOURCE_PCLKDIV2

#define PCA_CLOCK_SOURCE_PCLKDIV2   (PCA_MOD_CPS_2)

Specify PCLK divider 2 as pca input clock source

◆ PCA_CLOCK_SOURCE_PCLKDIV32

#define PCA_CLOCK_SOURCE_PCLKDIV32   0x00000000U

Specify PCLK divider 32 as pca input clock source

◆ PCA_CLOCK_SOURCE_PCLKDIV4

#define PCA_CLOCK_SOURCE_PCLKDIV4   (PCA_MOD_CPS_1 | PCA_MOD_CPS_0)

Specify PCLK divider 4 as pca input clock source

◆ PCA_CLOCK_SOURCE_PCLKDIV8

#define PCA_CLOCK_SOURCE_PCLKDIV8   (PCA_MOD_CPS_1)

Specify PCLK divider 8 as pca input clock source

◆ PCA_CLOCK_SOURCE_TIM10_OVERFLOW

#define PCA_CLOCK_SOURCE_TIM10_OVERFLOW   (PCA_MOD_CPS_2 | PCA_MOD_CPS_0)

Specify TIM10 overflow as pca input clock source

◆ PCA_CLOCK_SOURCE_TIM11_OVERFLOW

#define PCA_CLOCK_SOURCE_TIM11_OVERFLOW   (PCA_MOD_CPS_2 | PCA_MOD_CPS_1)

Specify TIM11 overflow as pca input clock source