MG32L003 Standard Peripherals Firmware Library
Modules
Here is a list of all modules:
[detail level 1234]
 CMSIS Core Instruction Interface
 CMSIS SIMD Intrinsics
 CMSIS Global Defines
 Defines and Type DefinitionsType definitions and defines for Cortex-M processor based devices
 Status and Control RegistersCore Register type definitions
 Nested Vectored Interrupt Controller (NVIC)Type definitions for the NVIC Registers
 System Control Block (SCB)Type definitions for the System Control Block Registers
 System Tick Timer (SysTick)Type definitions for the System Timer Registers
 Core Debug Registers (CoreDebug)Cortex-M0+ Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor. Therefore they are not covered by the Cortex-M0+ header file
 Core register bit field macrosMacros for use with bit field definitions (xxx_Pos, xxx_Msk)
 Core DefinitionsDefinitions for base addresses, unions, and structures
 Functions and Instructions Reference
 CMSIS Core Register Access Functions
 NVIC FunctionsFunctions that manage interrupts and exceptions via the NVIC
 FPU FunctionsFunction that provides FPU type
 SysTick FunctionsFunctions that configure the System
 MG32L003_System_Private_Includes
 MG32L003_System_Private_Defines
 MG32L003_System_Private_Variables
 MG32L003_System_Private_Functions
 CMSIS
 Mg32l003
 MG32L003_StdPeriph_Driver
 MISCMISC driver modules
 ADCADC driver modules
 AWKAWK driver modules
 BaseTIMBaseTIM driver modules
 BEEPBEEP driver modules
 CRCCRC driver modules
 FLASHFLASH driver modules
 GPIOGPIO driver modules
 I2CI2C driver modules
 IWDGIWDG driver modules
 LPTIMLPTIM driver modules
 LPUARTLPUART driver modules
 LVDLVD driver modules
 OWIREOWIRE driver modules
 PCAPCA driver modules
 PWRPWR driver modules
 RCCRCC driver modules
 RTCRTC driver modules
 SPISPI driver modules
 TIMTIM driver modules
 UARTUART driver modules
 VCMPVCMP driver modules
 WWDGWWDG driver modules
 BASETIM
 SYSCONSYSCON driver modules
 MG32L003_StdPeriph_Template