MG32L003 Standard Peripherals Firmware Library
|
Macros | |
#define | ADC_IT_CONTINUE ADC_INTEN_CONT_IEN |
#define | ADC_IT_RANGE_THRESHOLD ADC_INTEN_REG_IEN |
#define | ADC_IT_HIGH_THRESHOLD ADC_INTEN_HHT_IEN |
#define | ADC_IT_LOW_THRESHOLD ADC_INTEN_LLT_IEN |
#define | ADC_IT_CHANNEL15 ADC_INTEN_ADCXIEN_15 |
#define | ADC_IT_CHANNEL14 ADC_INTEN_ADCXIEN_14 |
#define | ADC_IT_CHANNEL13 ADC_INTEN_ADCXIEN_13 |
#define | ADC_IT_CHANNEL12 ADC_INTEN_ADCXIEN_12 |
#define | ADC_IT_CHANNEL11 ADC_INTEN_ADCXIEN_11 |
#define | ADC_IT_CHANNEL10 ADC_INTEN_ADCXIEN_10 |
#define | ADC_IT_CHANNEL9 ADC_INTEN_ADCXIEN_9 |
#define | ADC_IT_CHANNEL8 ADC_INTEN_ADCXIEN_8 |
#define | ADC_IT_CHANNEL7 ADC_INTEN_ADCXIEN_7 |
#define | ADC_IT_CHANNEL6 ADC_INTEN_ADCXIEN_6 |
#define | ADC_IT_CHANNEL5 ADC_INTEN_ADCXIEN_5 |
#define | ADC_IT_CHANNEL4 ADC_INTEN_ADCXIEN_4 |
#define | ADC_IT_CHANNEL3 ADC_INTEN_ADCXIEN_3 |
#define | ADC_IT_CHANNEL2 ADC_INTEN_ADCXIEN_2 |
#define | ADC_IT_CHANNEL1 ADC_INTEN_ADCXIEN_1 |
#define | ADC_IT_CHANNEL0 ADC_INTEN_ADCXIEN_0 |
#define | ADC_IT_MASK (0xFFFFFUL) |
#define | IS_ADC_IT(ADC_IT) (((ADC_IT) & ADC_IT_MASK) != 0x00000) |
#define ADC_IT_CHANNEL0 ADC_INTEN_ADCXIEN_0 |
ADC End of channel 0 conversion interrupt source
#define ADC_IT_CHANNEL1 ADC_INTEN_ADCXIEN_1 |
ADC End of channel 1 conversion interrupt source
#define ADC_IT_CHANNEL10 ADC_INTEN_ADCXIEN_10 |
ADC End of channel 10 conversion interrupt source
#define ADC_IT_CHANNEL11 ADC_INTEN_ADCXIEN_11 |
ADC End of channel 11 conversion interrupt source
#define ADC_IT_CHANNEL12 ADC_INTEN_ADCXIEN_12 |
ADC End of channel 12 conversion interrupt source
#define ADC_IT_CHANNEL13 ADC_INTEN_ADCXIEN_13 |
ADC End of channel 13 conversion interrupt source
#define ADC_IT_CHANNEL14 ADC_INTEN_ADCXIEN_14 |
ADC End of channel 14 conversion interrupt source
#define ADC_IT_CHANNEL15 ADC_INTEN_ADCXIEN_15 |
ADC End of channel 15 conversion interrupt source
#define ADC_IT_CHANNEL2 ADC_INTEN_ADCXIEN_2 |
ADC End of channel 2 conversion interrupt source
#define ADC_IT_CHANNEL3 ADC_INTEN_ADCXIEN_3 |
ADC End of channel 3 conversion interrupt source
#define ADC_IT_CHANNEL4 ADC_INTEN_ADCXIEN_4 |
ADC End of channel 4 conversion interrupt source
#define ADC_IT_CHANNEL5 ADC_INTEN_ADCXIEN_5 |
ADC End of channel 5 conversion interrupt source
#define ADC_IT_CHANNEL6 ADC_INTEN_ADCXIEN_6 |
ADC End of channel 6 conversion interrupt source
#define ADC_IT_CHANNEL7 ADC_INTEN_ADCXIEN_7 |
ADC End of channel 7 conversion interrupt source
#define ADC_IT_CHANNEL8 ADC_INTEN_ADCXIEN_8 |
ADC End of channel 8 conversion interrupt source
#define ADC_IT_CHANNEL9 ADC_INTEN_ADCXIEN_9 |
ADC End of channel 9 conversion interrupt source
#define ADC_IT_CONTINUE ADC_INTEN_CONT_IEN |
ADC End of Continue Conversion interrupt source
#define ADC_IT_HIGH_THRESHOLD ADC_INTEN_HHT_IEN |
ADC conversion data above threshold interrupt source
#define ADC_IT_LOW_THRESHOLD ADC_INTEN_LLT_IEN |
ADC conversion data below threshold interrupt source
#define ADC_IT_MASK (0xFFFFFUL) |
ADC interrupt mask
#define ADC_IT_RANGE_THRESHOLD ADC_INTEN_REG_IEN |
ADC conversion data in defined range interrupt source