|
MG32F10x Standard Peripherals Firmware Library
|
Definitions for base addresses, unions, and structures. More...
Macros | |
| #define | SCS_BASE (0xE000E000UL) |
| #define | ITM_BASE (0xE0000000UL) |
| #define | DWT_BASE (0xE0001000UL) |
| #define | TPI_BASE (0xE0040000UL) |
| #define | CoreDebug_BASE (0xE000EDF0UL) |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| #define | SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| #define | ITM ((ITM_Type *) ITM_BASE ) |
| #define | DWT ((DWT_Type *) DWT_BASE ) |
| #define | TPI ((TPI_Type *) TPI_BASE ) |
| #define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) |
Definitions for base addresses, unions, and structures.
| #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) |
Core Debug configuration struct
| #define CoreDebug_BASE (0xE000EDF0UL) |
Core Debug Base Address
| #define DWT_BASE (0xE0001000UL) |
DWT Base Address
| #define ITM_BASE (0xE0000000UL) |
ITM Base Address
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address
| #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
System control Register not in SCB
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address
| #define TPI_BASE (0xE0040000UL) |
TPI Base Address