11 #ifndef __MG32F157_ADC_H 12 #define __MG32F157_ADC_H 67 #define IS_ADC_ALL_PERIPH(PERIPH) (((PERIPH) == ADC1) || \ 68 ((PERIPH) == ADC2) || \ 71 #define IS_ADC_DMA_PERIPH(PERIPH) (((PERIPH) == ADC1) || \ 77 #define ADC_Mode_Independent ((uint32_t)0x00000000) 78 #define ADC_Mode_RegInjecSimult ((uint32_t)0x00010000) 79 #define ADC_Mode_RegSimult_AlterTrig ((uint32_t)0x00020000) 80 #define ADC_Mode_InjecSimult_FastInterl ((uint32_t)0x00030000) 81 #define ADC_Mode_InjecSimult_SlowInterl ((uint32_t)0x00040000) 82 #define ADC_Mode_InjecSimult ((uint32_t)0x00050000) 83 #define ADC_Mode_RegSimult ((uint32_t)0x00060000) 84 #define ADC_Mode_FastInterl ((uint32_t)0x00070000) 85 #define ADC_Mode_SlowInterl ((uint32_t)0x00080000) 86 #define ADC_Mode_AlterTrig ((uint32_t)0x00090000) 88 #define IS_ADC_MODE(MODE) (((MODE) == ADC_Mode_Independent) || \ 89 ((MODE) == ADC_Mode_RegInjecSimult) || \ 90 ((MODE) == ADC_Mode_RegSimult_AlterTrig) || \ 91 ((MODE) == ADC_Mode_InjecSimult_FastInterl) || \ 92 ((MODE) == ADC_Mode_InjecSimult_SlowInterl) || \ 93 ((MODE) == ADC_Mode_InjecSimult) || \ 94 ((MODE) == ADC_Mode_RegSimult) || \ 95 ((MODE) == ADC_Mode_FastInterl) || \ 96 ((MODE) == ADC_Mode_SlowInterl) || \ 97 ((MODE) == ADC_Mode_AlterTrig)) 106 #define ADC_ExternalTrigConv_T1_CC1 ((uint32_t)0x00000000) 107 #define ADC_ExternalTrigConv_T1_CC2 ((uint32_t)0x00020000) 108 #define ADC_ExternalTrigConv_T2_CC2 ((uint32_t)0x00060000) 109 #define ADC_ExternalTrigConv_T3_TRGO ((uint32_t)0x00080000) 110 #define ADC_ExternalTrigConv_T4_CC4 ((uint32_t)0x000A0000) 111 #define ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO ((uint32_t)0x000C0000) 113 #define ADC_ExternalTrigConv_T1_CC3 ((uint32_t)0x00040000) 114 #define ADC_ExternalTrigConv_None ((uint32_t)0x000E0000) 116 #define ADC_ExternalTrigConv_T3_CC1 ((uint32_t)0x00000000) 117 #define ADC_ExternalTrigConv_T2_CC3 ((uint32_t)0x00020000) 118 #define ADC_ExternalTrigConv_T8_CC1 ((uint32_t)0x00060000) 119 #define ADC_ExternalTrigConv_T8_TRGO ((uint32_t)0x00080000) 120 #define ADC_ExternalTrigConv_T5_CC1 ((uint32_t)0x000A0000) 121 #define ADC_ExternalTrigConv_T5_CC3 ((uint32_t)0x000C0000) 123 #define IS_ADC_EXT_TRIG(REGTRIG) (((REGTRIG) == ADC_ExternalTrigConv_T1_CC1) || \ 124 ((REGTRIG) == ADC_ExternalTrigConv_T1_CC2) || \ 125 ((REGTRIG) == ADC_ExternalTrigConv_T1_CC3) || \ 126 ((REGTRIG) == ADC_ExternalTrigConv_T2_CC2) || \ 127 ((REGTRIG) == ADC_ExternalTrigConv_T3_TRGO) || \ 128 ((REGTRIG) == ADC_ExternalTrigConv_T4_CC4) || \ 129 ((REGTRIG) == ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO) || \ 130 ((REGTRIG) == ADC_ExternalTrigConv_None) || \ 131 ((REGTRIG) == ADC_ExternalTrigConv_T3_CC1) || \ 132 ((REGTRIG) == ADC_ExternalTrigConv_T2_CC3) || \ 133 ((REGTRIG) == ADC_ExternalTrigConv_T8_CC1) || \ 134 ((REGTRIG) == ADC_ExternalTrigConv_T8_TRGO) || \ 135 ((REGTRIG) == ADC_ExternalTrigConv_T5_CC1) || \ 136 ((REGTRIG) == ADC_ExternalTrigConv_T5_CC3)) 145 #define ADC_DataAlign_Right ((uint32_t)0x00000000) 146 #define ADC_DataAlign_Left ((uint32_t)0x00000800) 147 #define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DataAlign_Right) || \ 148 ((ALIGN) == ADC_DataAlign_Left)) 157 #define ADC_Channel_0 ((uint8_t)0x00) 158 #define ADC_Channel_1 ((uint8_t)0x01) 159 #define ADC_Channel_2 ((uint8_t)0x02) 160 #define ADC_Channel_3 ((uint8_t)0x03) 161 #define ADC_Channel_4 ((uint8_t)0x04) 162 #define ADC_Channel_5 ((uint8_t)0x05) 163 #define ADC_Channel_6 ((uint8_t)0x06) 164 #define ADC_Channel_7 ((uint8_t)0x07) 165 #define ADC_Channel_8 ((uint8_t)0x08) 166 #define ADC_Channel_9 ((uint8_t)0x09) 167 #define ADC_Channel_10 ((uint8_t)0x0A) 168 #define ADC_Channel_11 ((uint8_t)0x0B) 169 #define ADC_Channel_12 ((uint8_t)0x0C) 170 #define ADC_Channel_13 ((uint8_t)0x0D) 171 #define ADC_Channel_14 ((uint8_t)0x0E) 172 #define ADC_Channel_15 ((uint8_t)0x0F) 173 #define ADC_Channel_16 ((uint8_t)0x10) 174 #define ADC_Channel_17 ((uint8_t)0x11) 176 #define ADC_Channel_TempSensor ((uint8_t)ADC_Channel_16) 177 #define ADC_Channel_Vrefint ((uint8_t)ADC_Channel_17) 179 #define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_Channel_0) || ((CHANNEL) == ADC_Channel_1) || \ 180 ((CHANNEL) == ADC_Channel_2) || ((CHANNEL) == ADC_Channel_3) || \ 181 ((CHANNEL) == ADC_Channel_4) || ((CHANNEL) == ADC_Channel_5) || \ 182 ((CHANNEL) == ADC_Channel_6) || ((CHANNEL) == ADC_Channel_7) || \ 183 ((CHANNEL) == ADC_Channel_8) || ((CHANNEL) == ADC_Channel_9) || \ 184 ((CHANNEL) == ADC_Channel_10) || ((CHANNEL) == ADC_Channel_11) || \ 185 ((CHANNEL) == ADC_Channel_12) || ((CHANNEL) == ADC_Channel_13) || \ 186 ((CHANNEL) == ADC_Channel_14) || ((CHANNEL) == ADC_Channel_15) || \ 187 ((CHANNEL) == ADC_Channel_16) || ((CHANNEL) == ADC_Channel_17)) 196 #define ADC_SampleTime_1Cycles5 ((uint8_t)0x00) 197 #define ADC_SampleTime_7Cycles5 ((uint8_t)0x01) 198 #define ADC_SampleTime_13Cycles5 ((uint8_t)0x02) 199 #define ADC_SampleTime_28Cycles5 ((uint8_t)0x03) 200 #define ADC_SampleTime_41Cycles5 ((uint8_t)0x04) 201 #define ADC_SampleTime_55Cycles5 ((uint8_t)0x05) 202 #define ADC_SampleTime_71Cycles5 ((uint8_t)0x06) 203 #define ADC_SampleTime_239Cycles5 ((uint8_t)0x07) 204 #define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SampleTime_1Cycles5) || \ 205 ((TIME) == ADC_SampleTime_7Cycles5) || \ 206 ((TIME) == ADC_SampleTime_13Cycles5) || \ 207 ((TIME) == ADC_SampleTime_28Cycles5) || \ 208 ((TIME) == ADC_SampleTime_41Cycles5) || \ 209 ((TIME) == ADC_SampleTime_55Cycles5) || \ 210 ((TIME) == ADC_SampleTime_71Cycles5) || \ 211 ((TIME) == ADC_SampleTime_239Cycles5)) 220 #define ADC_ExternalTrigInjecConv_T2_TRGO ((uint32_t)0x00002000) 221 #define ADC_ExternalTrigInjecConv_T2_CC1 ((uint32_t)0x00003000) 222 #define ADC_ExternalTrigInjecConv_T3_CC4 ((uint32_t)0x00004000) 223 #define ADC_ExternalTrigInjecConv_T4_TRGO ((uint32_t)0x00005000) 224 #define ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4 ((uint32_t)0x00006000) 226 #define ADC_ExternalTrigInjecConv_T1_TRGO ((uint32_t)0x00000000) 227 #define ADC_ExternalTrigInjecConv_T1_CC4 ((uint32_t)0x00001000) 228 #define ADC_ExternalTrigInjecConv_None ((uint32_t)0x00007000) 230 #define ADC_ExternalTrigInjecConv_T4_CC3 ((uint32_t)0x00002000) 231 #define ADC_ExternalTrigInjecConv_T8_CC2 ((uint32_t)0x00003000) 232 #define ADC_ExternalTrigInjecConv_T8_CC4 ((uint32_t)0x00004000) 233 #define ADC_ExternalTrigInjecConv_T5_TRGO ((uint32_t)0x00005000) 234 #define ADC_ExternalTrigInjecConv_T5_CC4 ((uint32_t)0x00006000) 236 #define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_ExternalTrigInjecConv_T1_TRGO) || \ 237 ((INJTRIG) == ADC_ExternalTrigInjecConv_T1_CC4) || \ 238 ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_TRGO) || \ 239 ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_CC1) || \ 240 ((INJTRIG) == ADC_ExternalTrigInjecConv_T3_CC4) || \ 241 ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_TRGO) || \ 242 ((INJTRIG) == ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4) || \ 243 ((INJTRIG) == ADC_ExternalTrigInjecConv_None) || \ 244 ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_CC3) || \ 245 ((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC2) || \ 246 ((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC4) || \ 247 ((INJTRIG) == ADC_ExternalTrigInjecConv_T5_TRGO) || \ 248 ((INJTRIG) == ADC_ExternalTrigInjecConv_T5_CC4)) 257 #define ADC_InjectedChannel_1 ((uint8_t)0x14) 258 #define ADC_InjectedChannel_2 ((uint8_t)0x18) 259 #define ADC_InjectedChannel_3 ((uint8_t)0x1C) 260 #define ADC_InjectedChannel_4 ((uint8_t)0x20) 261 #define IS_ADC_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) == ADC_InjectedChannel_1) || \ 262 ((CHANNEL) == ADC_InjectedChannel_2) || \ 263 ((CHANNEL) == ADC_InjectedChannel_3) || \ 264 ((CHANNEL) == ADC_InjectedChannel_4)) 273 #define ADC_AnalogWatchdog_SingleRegEnable ((uint32_t)0x00800200) 274 #define ADC_AnalogWatchdog_SingleInjecEnable ((uint32_t)0x00400200) 275 #define ADC_AnalogWatchdog_SingleRegOrInjecEnable ((uint32_t)0x00C00200) 276 #define ADC_AnalogWatchdog_AllRegEnable ((uint32_t)0x00800000) 277 #define ADC_AnalogWatchdog_AllInjecEnable ((uint32_t)0x00400000) 278 #define ADC_AnalogWatchdog_AllRegAllInjecEnable ((uint32_t)0x00C00000) 279 #define ADC_AnalogWatchdog_None ((uint32_t)0x00000000) 281 #define IS_ADC_ANALOG_WATCHDOG(WATCHDOG) (((WATCHDOG) == ADC_AnalogWatchdog_SingleRegEnable) || \ 282 ((WATCHDOG) == ADC_AnalogWatchdog_SingleInjecEnable) || \ 283 ((WATCHDOG) == ADC_AnalogWatchdog_SingleRegOrInjecEnable) || \ 284 ((WATCHDOG) == ADC_AnalogWatchdog_AllRegEnable) || \ 285 ((WATCHDOG) == ADC_AnalogWatchdog_AllInjecEnable) || \ 286 ((WATCHDOG) == ADC_AnalogWatchdog_AllRegAllInjecEnable) || \ 287 ((WATCHDOG) == ADC_AnalogWatchdog_None)) 296 #define ADC_IT_EOC ((uint16_t)0x0220) 297 #define ADC_IT_AWD ((uint16_t)0x0140) 298 #define ADC_IT_JEOC ((uint16_t)0x0480) 300 #define IS_ADC_IT(IT) ((((IT) & (uint16_t)0xF81F) == 0x00) && ((IT) != 0x00)) 302 #define IS_ADC_GET_IT(IT) (((IT) == ADC_IT_EOC) || ((IT) == ADC_IT_AWD) || \ 303 ((IT) == ADC_IT_JEOC)) 312 #define ADC_FLAG_AWD ((uint8_t)0x01) 313 #define ADC_FLAG_EOC ((uint8_t)0x02) 314 #define ADC_FLAG_JEOC ((uint8_t)0x04) 315 #define ADC_FLAG_JSTRT ((uint8_t)0x08) 316 #define ADC_FLAG_STRT ((uint8_t)0x10) 317 #define IS_ADC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint8_t)0xE0) == 0x00) && ((FLAG) != 0x00)) 318 #define IS_ADC_GET_FLAG(FLAG) (((FLAG) == ADC_FLAG_AWD) || ((FLAG) == ADC_FLAG_EOC) || \ 319 ((FLAG) == ADC_FLAG_JEOC) || ((FLAG)== ADC_FLAG_JSTRT) || \ 320 ((FLAG) == ADC_FLAG_STRT)) 329 #define IS_ADC_THRESHOLD(THRESHOLD) ((THRESHOLD) <= 0xFFF) 338 #define IS_ADC_OFFSET(OFFSET) ((OFFSET) <= 0xFFF) 347 #define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x4)) 356 #define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x4)) 365 #define IS_ADC_REGULAR_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x10)) 374 #define IS_ADC_REGULAR_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x10)) 383 #define IS_ADC_REGULAR_DISC_NUMBER(NUMBER) (((NUMBER) >= 0x1) && ((NUMBER) <= 0x8)) FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef *ADCx)
Gets the selected ADC Software start injected conversion Status.
Definition: mg32f157_adc.c:836
void ADC_ClearITPendingBit(ADC_TypeDef *ADCx, uint16_t ADC_IT)
Clears the ADCx's interrupt pending bits.
Definition: mg32f157_adc.c:1246
void ADC_TempSensorVrefintCmd(FunctionalState NewState)
Enables or disables the temperature sensor and Vrefint channel.
Definition: mg32f157_adc.c:1130
void ADC_DiscModeChannelCountConfig(ADC_TypeDef *ADCx, uint8_t Number)
Configures the discontinuous mode for the selected ADC regular group channel.
Definition: mg32f157_adc.c:472
void ADC_SoftwareStartConvCmd(ADC_TypeDef *ADCx, FunctionalState NewState)
Enables or disables the selected ADC software start conversion.
Definition: mg32f157_adc.c:420
FlagStatus ADC_GetResetCalibrationStatus(ADC_TypeDef *ADCx)
Gets the selected ADC reset calibration registers status.
Definition: mg32f157_adc.c:355
void ADC_Cmd(ADC_TypeDef *ADCx, FunctionalState NewState)
Enables or disables the specified ADC peripheral.
Definition: mg32f157_adc.c:262
ITStatus ADC_GetITStatus(ADC_TypeDef *ADCx, uint16_t ADC_IT)
Checks whether the specified ADC interrupt has occurred or not.
Definition: mg32f157_adc.c:1210
ADC Init structure definition.
Definition: mg32f157_adc.h:35
uint32_t ADC_Mode
Definition: mg32f157_adc.h:37
void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef *ADCx, uint8_t ADC_Channel)
Configures the analog watchdog guarded single channel.
Definition: mg32f157_adc.c:1108
void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef *ADCx, uint16_t HighThreshold, uint16_t LowThreshold)
Configures the high and low thresholds of the analog watchdog.
Definition: mg32f157_adc.c:1070
void ADC_DeInit(ADC_TypeDef *ADCx)
Deinitializes the ADCx peripheral registers to their default reset values.
Definition: mg32f157_adc.c:142
FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef *ADCx)
Gets the selected ADC Software start conversion Status.
Definition: mg32f157_adc.c:444
void ADC_AnalogWatchdogCmd(ADC_TypeDef *ADCx, uint32_t ADC_AnalogWatchdog)
Enables or disables the analog watchdog on single/all regular or injected channels.
Definition: mg32f157_adc.c:1045
void ADC_InjectedChannelConfig(ADC_TypeDef *ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime)
Configures for the selected ADC injected channel its corresponding rank in the sequencer and its samp...
Definition: mg32f157_adc.c:893
void ADC_DMACmd(ADC_TypeDef *ADCx, FunctionalState NewState)
Enables or disables the specified ADC DMA request.
Definition: mg32f157_adc.c:287
Definition: mg32f157.h:228
void ADC_ResetCalibration(ADC_TypeDef *ADCx)
Resets the selected ADC calibration registers.
Definition: mg32f157_adc.c:342
void ADC_Init(ADC_TypeDef *ADCx, ADC_InitTypeDef *ADC_InitStruct)
Initializes the ADCx peripheral according to the specified parameters in the ADC_InitStruct.
Definition: mg32f157_adc.c:181
FunctionalState ADC_ScanConvMode
Definition: mg32f157_adc.h:41
void ADC_DiscModeCmd(ADC_TypeDef *ADCx, FunctionalState NewState)
Enables or disables the discontinuous mode on regular group channel for the specified ADC.
Definition: mg32f157_adc.c:499
uint32_t ADC_ExternalTrigConv
Definition: mg32f157_adc.h:49
uint16_t ADC_GetConversionValue(ADC_TypeDef *ADCx)
Returns the last ADCx conversion result data for regular channel.
Definition: mg32f157_adc.c:671
FunctionalState ADC_ContinuousConvMode
Definition: mg32f157_adc.h:45
void ADC_InjectedDiscModeCmd(ADC_TypeDef *ADCx, FunctionalState NewState)
Enables or disables the discontinuous mode for injected group channel for the specified ADC.
Definition: mg32f157_adc.c:723
void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef *ADCx, uint32_t ADC_ExternalTrigInjecConv)
Configures the ADCx external trigger for injected channels conversion.
Definition: mg32f157_adc.c:762
uint8_t ADC_NbrOfChannel
Definition: mg32f157_adc.h:56
void ADC_ITConfig(ADC_TypeDef *ADCx, uint16_t ADC_IT, FunctionalState NewState)
Enables or disables the specified ADC interrupts.
Definition: mg32f157_adc.c:316
void ADC_InjectedSequencerLengthConfig(ADC_TypeDef *ADCx, uint8_t Length)
Configures the sequencer length for injected channels.
Definition: mg32f157_adc.c:956
FlagStatus ADC_GetFlagStatus(ADC_TypeDef *ADCx, uint8_t ADC_FLAG)
Checks whether the specified ADC flag is set or not.
Definition: mg32f157_adc.c:1158
void ADC_ExternalTrigInjectedConvCmd(ADC_TypeDef *ADCx, FunctionalState NewState)
Enables or disables the ADCx injected channels conversion through external trigger.
Definition: mg32f157_adc.c:787
void ADC_StructInit(ADC_InitTypeDef *ADC_InitStruct)
Fills each ADC_InitStruct member with its default value.
Definition: mg32f157_adc.c:238
void ADC_StartCalibration(ADC_TypeDef *ADCx)
Starts the selected ADC calibration process.
Definition: mg32f157_adc.c:380
uint32_t ADC_DataAlign
Definition: mg32f157_adc.h:53
uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef *ADCx, uint8_t ADC_InjectedChannel)
Returns the ADC injected channel conversion result.
Definition: mg32f157_adc.c:1015
void ADC_ExternalTrigConvCmd(ADC_TypeDef *ADCx, FunctionalState NewState)
Enables or disables the ADCx conversion through external trigger.
Definition: mg32f157_adc.c:649
uint32_t ADC_GetDualModeConversionValue(void)
Returns the last ADC1 and ADC2 conversion result data in dual mode.
Definition: mg32f157_adc.c:683
void ADC_RegularChannelConfig(ADC_TypeDef *ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime)
Configures for the selected ADC regular channel its corresponding rank in the sequencer and its sampl...
Definition: mg32f157_adc.c:553
void ADC_SetInjectedOffset(ADC_TypeDef *ADCx, uint8_t ADC_InjectedChannel, uint16_t Offset)
Set the injected channels conversion value offset.
Definition: mg32f157_adc.c:988
void ADC_SoftwareStartInjectedConvCmd(ADC_TypeDef *ADCx, FunctionalState NewState)
Enables or disables the selected ADC start of the injected channels conversion.
Definition: mg32f157_adc.c:812
FlagStatus ADC_GetCalibrationStatus(ADC_TypeDef *ADCx)
Gets the selected ADC calibration status.
Definition: mg32f157_adc.c:393
void ADC_AutoInjectedConvCmd(ADC_TypeDef *ADCx, FunctionalState NewState)
Enables or disables the selected ADC automatic injected group conversion after regular one.
Definition: mg32f157_adc.c:697
void ADC_ClearFlag(ADC_TypeDef *ADCx, uint8_t ADC_FLAG)
Clears the ADCx's pending flags.
Definition: mg32f157_adc.c:1191