MG32F157 Standard Peripherals Firmware Library
Macros

Macros

#define QSPI_CSHTime_1Cycle   ((uint32_t)0x00000000)
 
#define QSPI_CSHTime_2Cycle   ((uint32_t)QUADSPI_DCR_CSHT_0)
 
#define QSPI_CSHTime_3Cycle   ((uint32_t)QUADSPI_DCR_CSHT_1)
 
#define QSPI_CSHTime_4Cycle   ((uint32_t)QUADSPI_DCR_CSHT_0 | QUADSPI_DCR_CSHT_1)
 
#define QSPI_CSHTime_5Cycle   ((uint32_t)QUADSPI_DCR_CSHT_2)
 
#define QSPI_CSHTime_6Cycle   ((uint32_t)QUADSPI_DCR_CSHT_2 | QUADSPI_DCR_CSHT_0)
 
#define QSPI_CSHTime_7Cycle   ((uint32_t)QUADSPI_DCR_CSHT_2 | QUADSPI_DCR_CSHT_1)
 
#define QSPI_CSHTime_8Cycle   ((uint32_t)QUADSPI_DCR_CSHT)
 
#define IS_QSPI_CSHTIME(CSHTIME)
 

Detailed Description

Macro Definition Documentation

◆ IS_QSPI_CSHTIME

#define IS_QSPI_CSHTIME (   CSHTIME)
Value:
(((CSHTIME) == QSPI_CSHTime_1Cycle) || \
((CSHTIME) == QSPI_CSHTime_2Cycle) || \
((CSHTIME) == QSPI_CSHTime_3Cycle) || \
((CSHTIME) == QSPI_CSHTime_4Cycle) || \
((CSHTIME) == QSPI_CSHTime_5Cycle) || \
((CSHTIME) == QSPI_CSHTime_6Cycle) || \
((CSHTIME) == QSPI_CSHTime_7Cycle) || \
((CSHTIME) == QSPI_CSHTime_8Cycle))