MG32F157 Standard Peripherals Firmware Library
mg32f157_spi.h
Go to the documentation of this file.
1 
10 /* Define to prevent recursive inclusion -------------------------------------*/
11 #ifndef __MG32F157_SPI_H
12 #define __MG32F157_SPI_H
13 
14 #ifdef __cplusplus
15  extern "C" {
16 #endif
17 
18 /* Includes ------------------------------------------------------------------*/
19 #include "mg32f157.h"
20 
29 /* Exported types ------------------------------------------------------------*/
30 
34 typedef struct
35 {
36  uint16_t SPI_Direction;
39  uint16_t SPI_Mode;
42  uint16_t SPI_DataSize;
45  uint16_t SPI_CPOL;
48  uint16_t SPI_CPHA;
51  uint16_t SPI_NSS;
61  uint16_t SPI_FirstBit;
64  uint16_t SPI_CRCPolynomial;
66 
70 typedef struct
71 {
72  uint16_t I2S_Mode;
75  uint16_t I2S_Standard;
78  uint16_t I2S_DataFormat;
81  uint16_t I2S_MCLKOutput;
84  uint32_t I2S_AudioFreq;
87  uint16_t I2S_CPOL;
90 
91 /* Exported constants --------------------------------------------------------*/
92 
97 #define IS_SPI_ALL_PERIPH(PERIPH) (((PERIPH) == SPI1) || \
98  ((PERIPH) == SPI2) || \
99  ((PERIPH) == SPI3))
100 
101 #define IS_SPI_23_PERIPH(PERIPH) (((PERIPH) == SPI2) || \
102  ((PERIPH) == SPI3))
103 
104 
108 #define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000)
109 #define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400)
110 #define SPI_Direction_1Line_Rx ((uint16_t)0x8000)
111 #define SPI_Direction_1Line_Tx ((uint16_t)0xC000)
112 #define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \
113  ((MODE) == SPI_Direction_2Lines_RxOnly) || \
114  ((MODE) == SPI_Direction_1Line_Rx) || \
115  ((MODE) == SPI_Direction_1Line_Tx))
116 
124 #define SPI_Mode_Master ((uint16_t)0x0104)
125 #define SPI_Mode_Slave ((uint16_t)0x0000)
126 #define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \
127  ((MODE) == SPI_Mode_Slave))
128 
136 #define SPI_DataSize_16b ((uint16_t)0x0800)
137 #define SPI_DataSize_8b ((uint16_t)0x0000)
138 #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) || \
139  ((DATASIZE) == SPI_DataSize_8b))
140 
148 #define SPI_CPOL_Low ((uint16_t)0x0000)
149 #define SPI_CPOL_High ((uint16_t)0x0002)
150 #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \
151  ((CPOL) == SPI_CPOL_High))
152 
160 #define SPI_CPHA_1Edge ((uint16_t)0x0000)
161 #define SPI_CPHA_2Edge ((uint16_t)0x0001)
162 #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \
163  ((CPHA) == SPI_CPHA_2Edge))
164 
172 #define SPI_NSS_Soft ((uint16_t)0x0200)
173 #define SPI_NSS_Hard ((uint16_t)0x0000)
174 #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \
175  ((NSS) == SPI_NSS_Hard))
176 
184 #define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000)
185 #define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008)
186 #define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010)
187 #define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018)
188 #define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020)
189 #define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028)
190 #define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030)
191 #define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038)
192 #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \
193  ((PRESCALER) == SPI_BaudRatePrescaler_4) || \
194  ((PRESCALER) == SPI_BaudRatePrescaler_8) || \
195  ((PRESCALER) == SPI_BaudRatePrescaler_16) || \
196  ((PRESCALER) == SPI_BaudRatePrescaler_32) || \
197  ((PRESCALER) == SPI_BaudRatePrescaler_64) || \
198  ((PRESCALER) == SPI_BaudRatePrescaler_128) || \
199  ((PRESCALER) == SPI_BaudRatePrescaler_256))
200 
208 #define SPI_FirstBit_MSB ((uint16_t)0x0000)
209 #define SPI_FirstBit_LSB ((uint16_t)0x0080)
210 #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \
211  ((BIT) == SPI_FirstBit_LSB))
212 
220 #define I2S_Mode_SlaveTx ((uint16_t)0x0000)
221 #define I2S_Mode_SlaveRx ((uint16_t)0x0100)
222 #define I2S_Mode_MasterTx ((uint16_t)0x0200)
223 #define I2S_Mode_MasterRx ((uint16_t)0x0300)
224 #define IS_I2S_MODE(MODE) (((MODE) == I2S_Mode_SlaveTx) || \
225  ((MODE) == I2S_Mode_SlaveRx) || \
226  ((MODE) == I2S_Mode_MasterTx) || \
227  ((MODE) == I2S_Mode_MasterRx) )
228 
236 #define I2S_Standard_Phillips ((uint16_t)0x0000)
237 #define I2S_Standard_MSB ((uint16_t)0x0010)
238 #define I2S_Standard_LSB ((uint16_t)0x0020)
239 #define I2S_Standard_PCMShort ((uint16_t)0x0030)
240 #define I2S_Standard_PCMLong ((uint16_t)0x00B0)
241 #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_Standard_Phillips) || \
242  ((STANDARD) == I2S_Standard_MSB) || \
243  ((STANDARD) == I2S_Standard_LSB) || \
244  ((STANDARD) == I2S_Standard_PCMShort) || \
245  ((STANDARD) == I2S_Standard_PCMLong))
246 
254 #define I2S_DataFormat_16b ((uint16_t)0x0000)
255 #define I2S_DataFormat_16bextended ((uint16_t)0x0001)
256 #define I2S_DataFormat_24b ((uint16_t)0x0003)
257 #define I2S_DataFormat_32b ((uint16_t)0x0005)
258 #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DataFormat_16b) || \
259  ((FORMAT) == I2S_DataFormat_16bextended) || \
260  ((FORMAT) == I2S_DataFormat_24b) || \
261  ((FORMAT) == I2S_DataFormat_32b))
262 
270 #define I2S_MCLKOutput_Enable ((uint16_t)0x0200)
271 #define I2S_MCLKOutput_Disable ((uint16_t)0x0000)
272 #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOutput_Enable) || \
273  ((OUTPUT) == I2S_MCLKOutput_Disable))
274 
282 #define I2S_AudioFreq_192k ((uint32_t)192000)
283 #define I2S_AudioFreq_96k ((uint32_t)96000)
284 #define I2S_AudioFreq_48k ((uint32_t)48000)
285 #define I2S_AudioFreq_44k ((uint32_t)44100)
286 #define I2S_AudioFreq_32k ((uint32_t)32000)
287 #define I2S_AudioFreq_22k ((uint32_t)22050)
288 #define I2S_AudioFreq_16k ((uint32_t)16000)
289 #define I2S_AudioFreq_11k ((uint32_t)11025)
290 #define I2S_AudioFreq_8k ((uint32_t)8000)
291 #define I2S_AudioFreq_Default ((uint32_t)2)
292 
293 #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AudioFreq_8k) && \
294  ((FREQ) <= I2S_AudioFreq_192k)) || \
295  ((FREQ) == I2S_AudioFreq_Default))
296 
304 #define I2S_CPOL_Low ((uint16_t)0x0000)
305 #define I2S_CPOL_High ((uint16_t)0x0008)
306 #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_Low) || \
307  ((CPOL) == I2S_CPOL_High))
308 
316 #define SPI_I2S_DMAReq_Tx ((uint16_t)0x0002)
317 #define SPI_I2S_DMAReq_Rx ((uint16_t)0x0001)
318 #define IS_SPI_I2S_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFC) == 0x00) && ((DMAREQ) != 0x00))
319 
327 #define SPI_NSSInternalSoft_Set ((uint16_t)0x0100)
328 #define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF)
329 #define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \
330  ((INTERNAL) == SPI_NSSInternalSoft_Reset))
331 
339 #define SPI_CRC_Tx ((uint8_t)0x00)
340 #define SPI_CRC_Rx ((uint8_t)0x01)
341 #define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx))
342 
350 #define SPI_Direction_Rx ((uint16_t)0xBFFF)
351 #define SPI_Direction_Tx ((uint16_t)0x4000)
352 #define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \
353  ((DIRECTION) == SPI_Direction_Tx))
354 
362 #define SPI_I2S_IT_TXE ((uint8_t)0x71)
363 #define SPI_I2S_IT_RXNE ((uint8_t)0x60)
364 #define SPI_I2S_IT_ERR ((uint8_t)0x50)
365 #define IS_SPI_I2S_CONFIG_IT(IT) (((IT) == SPI_I2S_IT_TXE) || \
366  ((IT) == SPI_I2S_IT_RXNE) || \
367  ((IT) == SPI_I2S_IT_ERR))
368 #define SPI_I2S_IT_OVR ((uint8_t)0x56)
369 #define SPI_IT_MODF ((uint8_t)0x55)
370 #define SPI_IT_CRCERR ((uint8_t)0x54)
371 #define I2S_IT_UDR ((uint8_t)0x53)
372 #define IS_SPI_I2S_CLEAR_IT(IT) (((IT) == SPI_IT_CRCERR))
373 #define IS_SPI_I2S_GET_IT(IT) (((IT) == SPI_I2S_IT_RXNE) || ((IT) == SPI_I2S_IT_TXE) || \
374  ((IT) == I2S_IT_UDR) || ((IT) == SPI_IT_CRCERR) || \
375  ((IT) == SPI_IT_MODF) || ((IT) == SPI_I2S_IT_OVR))
376 
383 #define SPI_I2S_FLAG_RXNE ((uint16_t)0x0001)
384 #define SPI_I2S_FLAG_TXE ((uint16_t)0x0002)
385 #define I2S_FLAG_CHSIDE ((uint16_t)0x0004)
386 #define I2S_FLAG_UDR ((uint16_t)0x0008)
387 #define SPI_FLAG_CRCERR ((uint16_t)0x0010)
388 #define SPI_FLAG_MODF ((uint16_t)0x0020)
389 #define SPI_I2S_FLAG_OVR ((uint16_t)0x0040)
390 #define SPI_I2S_FLAG_BSY ((uint16_t)0x0080)
391 #define IS_SPI_I2S_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR))
392 #define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) || ((FLAG) == SPI_I2S_FLAG_OVR) || \
393  ((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \
394  ((FLAG) == I2S_FLAG_UDR) || ((FLAG) == I2S_FLAG_CHSIDE) || \
395  ((FLAG) == SPI_I2S_FLAG_TXE) || ((FLAG) == SPI_I2S_FLAG_RXNE))
396 
404 #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1)
405 
414 /* Exported macro ------------------------------------------------------------*/
415 /* Exported functions --------------------------------------------------------*/
416 
417 void SPI_I2S_DeInit(SPI_TypeDef* SPIx);
418 void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
419 void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct);
420 void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);
421 void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct);
422 void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
423 void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
424 void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState);
425 void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState);
426 void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data);
427 uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx);
428 void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft);
429 void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
430 void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize);
431 void SPI_TransmitCRC(SPI_TypeDef* SPIx);
432 void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState);
433 uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC);
434 uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx);
435 void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction);
436 FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
437 void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
438 ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
439 void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
440 
449 #ifdef __cplusplus
450 }
451 #endif
452 
453 #endif /*__MG32F157_SPI_H */
Definition: mg32f157.h:842
uint16_t I2S_MCLKOutput
Definition: mg32f157_spi.h:81
void I2S_StructInit(I2S_InitTypeDef *I2S_InitStruct)
Fills each I2S_InitStruct member with its default value.
Definition: mg32f157_spi.c:322
void I2S_Cmd(SPI_TypeDef *SPIx, FunctionalState NewState)
Enables or disables the specified SPI peripheral (in I2S mode).
Definition: mg32f157_spi.c:375
uint16_t SPI_Direction
Definition: mg32f157_spi.h:36
ITStatus SPI_I2S_GetITStatus(SPI_TypeDef *SPIx, uint8_t SPI_I2S_IT)
Checks whether the specified SPI/I2S interrupt has occurred or not.
Definition: mg32f157_spi.c:753
void SPI_I2S_SendData(SPI_TypeDef *SPIx, uint16_t Data)
Transmits a Data through the SPIx/I2Sx peripheral.
Definition: mg32f157_spi.c:471
uint16_t SPI_CPOL
Definition: mg32f157_spi.h:45
void I2S_Init(SPI_TypeDef *SPIx, I2S_InitTypeDef *I2S_InitStruct)
Initializes the SPIx peripheral according to the specified parameters in the I2S_InitStruct.
Definition: mg32f157_spi.c:181
uint16_t I2S_Mode
Definition: mg32f157_spi.h:72
FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef *SPIx, uint16_t SPI_I2S_FLAG)
Checks whether the specified SPI/I2S flag is set or not.
Definition: mg32f157_spi.c:690
void SPI_StructInit(SPI_InitTypeDef *SPI_InitStruct)
Fills each SPI_InitStruct member with its default value.
Definition: mg32f157_spi.c:294
uint16_t I2S_CPOL
Definition: mg32f157_spi.h:87
uint16_t SPI_DataSize
Definition: mg32f157_spi.h:42
void SPI_I2S_ClearITPendingBit(SPI_TypeDef *SPIx, uint8_t SPI_I2S_IT)
Clears the SPIx CRC Error (CRCERR) interrupt pending bit.
Definition: mg32f157_spi.c:807
uint16_t SPI_I2S_ReceiveData(SPI_TypeDef *SPIx)
Returns the most recent received data by the SPIx/I2Sx peripheral.
Definition: mg32f157_spi.c:487
void SPI_SSOutputCmd(SPI_TypeDef *SPIx, FunctionalState NewState)
Enables or disables the SS output for the selected SPI.
Definition: mg32f157_spi.c:529
uint32_t I2S_AudioFreq
Definition: mg32f157_spi.h:84
uint16_t SPI_CPHA
Definition: mg32f157_spi.h:48
void SPI_BiDirectionalLineConfig(SPI_TypeDef *SPIx, uint16_t SPI_Direction)
Selects the data transfer direction in bi-directional mode for the specified SPI.
Definition: mg32f157_spi.c:656
uint16_t SPI_BaudRatePrescaler
Definition: mg32f157_spi.h:55
I2S Init structure definition.
Definition: mg32f157_spi.h:70
void SPI_TransmitCRC(SPI_TypeDef *SPIx)
Transmit the SPIx CRC value.
Definition: mg32f157_spi.c:571
void SPI_Init(SPI_TypeDef *SPIx, SPI_InitTypeDef *SPI_InitStruct)
Initializes the SPIx peripheral according to the specified parameters in the SPI_InitStruct.
Definition: mg32f157_spi.c:120
uint16_t SPI_NSS
Definition: mg32f157_spi.h:51
void SPI_NSSInternalSoftwareConfig(SPI_TypeDef *SPIx, uint16_t SPI_NSSInternalSoft)
Configures internally by software the NSS pin for the selected SPI.
Definition: mg32f157_spi.c:505
uint16_t SPI_Mode
Definition: mg32f157_spi.h:39
SPI Init structure definition.
Definition: mg32f157_spi.h:34
void SPI_I2S_ITConfig(SPI_TypeDef *SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState)
Enables or disables the specified SPI/I2S interrupts.
Definition: mg32f157_spi.c:406
void SPI_CalculateCRC(SPI_TypeDef *SPIx, FunctionalState NewState)
Enables or disables the CRC value calculation of the transferred bytes.
Definition: mg32f157_spi.c:587
void SPI_I2S_DMACmd(SPI_TypeDef *SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState)
Enables or disables the SPIx/I2Sx DMA interface.
Definition: mg32f157_spi.c:445
void SPI_I2S_DeInit(SPI_TypeDef *SPIx)
Deinitializes the SPIx peripheral registers to their default reset values (Affects also the I2Ss).
Definition: mg32f157_spi.c:81
uint16_t I2S_Standard
Definition: mg32f157_spi.h:75
void SPI_I2S_ClearFlag(SPI_TypeDef *SPIx, uint16_t SPI_I2S_FLAG)
Clears the SPIx CRC Error (CRCERR) flag.
Definition: mg32f157_spi.c:728
uint16_t I2S_DataFormat
Definition: mg32f157_spi.h:78
uint16_t SPI_CRCPolynomial
Definition: mg32f157_spi.h:64
uint16_t SPI_GetCRCPolynomial(SPI_TypeDef *SPIx)
Returns the CRC Polynomial register value for the specified SPI.
Definition: mg32f157_spi.c:638
uint16_t SPI_FirstBit
Definition: mg32f157_spi.h:61
uint16_t SPI_GetCRC(SPI_TypeDef *SPIx, uint8_t SPI_CRC)
Returns the transmit or the receive CRC register value for the specified SPI.
Definition: mg32f157_spi.c:613
void SPI_Cmd(SPI_TypeDef *SPIx, FunctionalState NewState)
Enables or disables the specified SPI peripheral.
Definition: mg32f157_spi.c:351
void SPI_DataSizeConfig(SPI_TypeDef *SPIx, uint16_t SPI_DataSize)
Configures the data size for the selected SPI.
Definition: mg32f157_spi.c:555