MG32F157 Standard Peripherals Firmware Library
drv_spi_flash_quad.h
1 #ifndef __DRV_QSPI_H
2 #define __DRV_QSPI_H
3 
4 #include "mg32f157.h"
5 
6 /* Instructions */
7 #define INS_WriteEnable 0x06
8 #define INS_WriteDisable 0x04
9 #define INS_ReadStatusReg1 0x05
10 #define INS_ReadStatusReg2 0x35
11 #define INS_ReadStatusReg3 0x15
12 #define INS_WriteStatusReg1 0x01
13 #define INS_WriteStatusReg2 0x31
14 #define INS_WriteStatusReg3 0x11
15 #define INS_ReadData 0x03
16 #define INS_QuadInputPageProgram 0x32
17 #define INS_FastReadQual 0xBB
18 #define INS_FastReadQuad 0xEB
19 #define INS_FastReadData 0x0B
20 #define INS_FastReadDual 0x3B
21 #define INS_PageProgram 0x02
22 #define INS_BlockErase 0xD8
23 #define INS_SectorErase 0x20
24 #define INS_ChipErase 0xC7
25 #define INS_PowerDown 0xB9
26 #define INS_ReleasePowerDown 0xAB
27 #define INS_DeviceID 0xAB
28 #define INS_ManufactDeviceID 0x90
29 #define INS_ManufactDeviceIDQual 0x92
30 #define INS_ManufactDeviceIDQSPI 0x94
31 #define INS_JedecDeviceID 0x9F
32 #define INS_Enable4ByteAddr 0xB7
33 #define INS_Exit4ByteAddr 0xE9
34 #define INS_SetReadParam 0xC0
35 #define INS_EnterQPIMode 0x38
36 #define INS_ExitQPIMode 0xFF
37 
38 /* Default dummy clocks cycles */
39 #define DUMMY_CLOCK_CYCLES_READ 8
40 #define DUMMY_CLOCK_CYCLES_READ_QUAD 16
41 #define DUMMY_CLOCK_CYCLES_READ_DTR 6
42 #define DUMMY_CLOCK_CYCLES_READ_QUAD_DTR 8
43 
44 /* Timeout default value */
45 #define QSPI_TIMEOUT_DEFAULT ((uint32_t)0x2FFFFFF)
46 
47 void SpiFlash_Init(void);
48 void QSPI_WriteEnable(void);
49 void QSPI_Receive_IT(void);
50 void QSPI_Transmit_IT(void);
51 uint32_t SpiFlash_ReadIdentification(void);
52 uint16_t SpiFlash_QuadReadMidDid(void);
53 void SpiFlash_WaitReady(void);
54 void SpiFlash_ChipErase(void);
55 void SpiFlash_SectorErase(uint32_t address);
56 void SpiFlash_QuadFastRead(uint32_t address, uint8_t* buffer, uint32_t length);
57 void SpiFlash_QuadPageProgram(uint32_t address, const uint8_t* buffer, uint16_t length);
58 void SpiFlash_QuadWriteBuffer(uint32_t address, const uint8_t* buffer, uint32_t length);
59 uint8_t SpiFlash_ReadStatusReg1(void);
60 uint8_t SpiFlash_ReadStatusReg2(void);
61 uint8_t SpiFlash_ReadStatusReg3(void);
62 
63 /* Exported macro ------------------------------------------------------------*/
64 
65 #endif /* __DRV_QSPI_H */
66