
/*
 * Auto generated Run-Time-Environment Configuration File
 *      *** Do not modify ! ***
 *
 * Project: 'Standard_Project' 
 * Target:  'Target 1' 
 */

#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H


/*
 * Define the Device Header File: 
 */
#define CMSIS_device_header "MG32x02z.h"

/* Megawin::ChipInit_Wizard:ADC:1.0.0 */
#define MG32x02z_ConfigerWizard_ADC
/* Megawin::ChipInit_Wizard:APB:1.0.0 */
#define MG32x02z_ConfigerWizard_APB
/* Megawin::ChipInit_Wizard:APX_CCL:1.0.0 */
#define MG32x02z_ConfigerWizard_APX_CCL
/* Megawin::ChipInit_Wizard:CMP:1.0.0 */
#define MG32x02z_ConfigerWizard_CMP
/* Megawin::ChipInit_Wizard:CSC:1.0.4 */
#define MG32x02z_ConfigerWizard_CSC
/* Megawin::ChipInit_Wizard:DAC:1.0.0 */
#define MG32x02z_ConfigerWizard_DAC
/* Megawin::ChipInit_Wizard:EMB:1.0.2 */
#define MG32x02z_ConfigerWizard_EMB
/* Megawin::ChipInit_Wizard:EXIC:LQFP80U:1.0.2 */
#define MG32x02z_ConfigerWizard_EXIC          
				#define MG32x02z_EXIC_FILENAME  "MG32x02z_EXIC_LQFP80U_Init.h"
/* Megawin::ChipInit_Wizard:GPIO:LQFP80U:1.0.0 */
#define MG32x02z_Package_LQFP80         
				#define MG32x02z_ConfigerWizard_GPIO
        #define MG32x02z_GPIO_FILENAME  "MG32x02z_GPIO_LQFP80U_Init.h"
/* Megawin::ChipInit_Wizard:GPL:1.0.1 */
#define MG32x02z_ConfigerWizard_GPL
/* Megawin::ChipInit_Wizard:MEM:1.0.1 */
#define MG32x02z_ConfigerWizard_MEM
/* Megawin::ChipInit_Wizard:PW:1.0.1 */
#define MG32x02z_ConfigerWizard_PW
/* Megawin::ChipInit_Wizard:RST:1.0.1 */
#define MG32x02z_ConfigerWizard_RST
/* Megawin::ChipInit_Wizard:RTC:1.0.0 */
#define MG32x02z_ConfigerWizard_RTC
/* Megawin::ChipInit_Wizard:Timer:1.0.0 */
#define MG32x02z_ConfigerWizard_TM
/* Megawin::ChipInit_Wizard:URT:1.0.1 */
#define MG32x02z_ConfigerWizard_URT
/* Megawin::Device:Startup:1.0.4 */
#define RTE_DEVICE_STARTUP_MG32F02U128    /* Device Startup for MG32F02U128 */
/* Megawin::Driver:Driver-All:1.0.1 */
#define IRQHandler_Driver_Level_
/* Megawin::IRQ_Handler:15. SysTick priority:Level-0 (High):1.0.0 */
#define MG32x02z_SYSTICK_IRQ_
#define MG32x02z_WWDT_IRQ_
#define MG32x02z_SYS_IRQ_
#define MG32x02z_EXINT0_IRQ_
#define MG32x02z_EXINT1_IRQ_
#define MG32x02z_EXINT2_IRQ_
#define MG32x02z_EXINT3_IRQ_
#define MG32x02z_COMP_IRQ_
#define MG32x02z_DMA_IRQ_
#define MG32x02z_ADC_IRQ_
#define MG32x02z_DAC_IRQ_
#define MG32x02z_TM0x_IRQ_
#define MG32x02z_TM10_IRQ_
#define MG32x02z_TM1x_IRQ_
#define MG32x02z_TM20_IRQ_
#define MG32x02z_TM2x_IRQ_
#define MG32x02z_TM3x_IRQ_
#define MG32x02z_URT0_IRQ_
#define MG32x02z_URT123_IRQ_
#define MG32x02z_URT4x_IRQ_
#define MG32x02z_SPI0_IRQ_
#define MG32x02z_I2C0_IRQ_
#define MG32x02z_I2Cx_IRQ_
#define MG32x02z_USB_IRQ_
#define MG32x02z_APX_IRQ_

        #define MG32x02z_SYSTICK_IRQ_Priority0
				#define MG32x02z_IRQ_Handler_
				#define IRQHandler_Middleware_Level_


//#define DEBUG_URTn       URT4

#endif /* RTE_COMPONENTS_H */
