/**
 ******************************************************************************
 *
 * @file        REG_MG82G5Exx.INC
 *
 * @brief       This is the header file of the SFR address.
 *
 * @par         Project
 *              MG82G5Exx
 * @version     v2.01
 * @date        2022/04/06
 * @copyright   Copyright (c) 2019 MegaWin Technology Co., Ltd.
 *              All rights reserved.
 *
 ******************************************************************************
 * @par         Disclaimer
 *      The Demo software is provided "AS IF"  without any warranty, either
 *      expressed or implied, including, but not limited to, the implied warranties
 *      of merchantability and fitness for a particular purpose.  The author will
 *      not be liable for any special, incidental, consequential or indirect
 *      damages due to loss of data or any other reason.
 *      These statements agree with the world wide and local dictated laws about
 *      authorship and violence against these laws.
 ******************************************************************************
 @if HIDE
 Modify History:
 * #2.00_Blake_20220215
 * >> Add SFR description
 * >> Add "_P" to the bitname of the Page_P SFR
 * #2.01_Blake_20220406
 * >>Modify "P4" &"P6" bitname of the Page_P SFR
 @endif
 ******************************************************************************
 * @internal
 * @sign
 * @endinternal
 */

#ifndef __REG_MG82G5Exx_INC
#define __REG_MG82G5Exx_INC

GF_7          EQU      080h
GF_6          EQU      040h
GF_5          EQU      020h
GF_4          EQU      010h
GF_3          EQU      008h
GF_2          EQU      004h
GF_1          EQU      002h
GF_0          EQU      001h

P0                    DATA     080H     //Port 0
// (bits in P0)
P07                   BIT      P0.7
P06                   BIT      P0.6
P05                   BIT      P0.5
P04                   BIT      P0.4
P03                   BIT      P0.3
P02                   BIT      P0.2
P01                   BIT      P0.1
P00                   BIT      P0.0

SP                    DATA     081H     //Stack Pointer

DPL                   DATA     082H     //Data Pointer Low

DPH                   DATA     083H     //Data Pointer High

SPSTAT                DATA     084H     //SPI Status Register
// (bits in SPSTAT)
SPIF                  EQU      080h
WCOL                  EQU      040h
THRF                  EQU      020h
SPIBSY                EQU      010h
MODF                  EQU      008h
SPR2                  EQU      001h

SPCON                 DATA     085H     //SPI Control Register
// (bits in SPCON)
SSIG                  EQU      080h
SPEN                  EQU      040h
DORD                  EQU      020h
MSTR                  EQU      010h
CPOL                  EQU      008h
CPHA                  EQU      004h
SPR1                  EQU      002h
SPR0                  EQU      001h

SPDAT                 DATA     086H     //SPI Data Register

PCON0                 DATA     087H     //Power Control 0
// (bits in PCON0)
SMOD1                 EQU      080h
SMOD0                 EQU      040h
POF0                  EQU      010h
GF1                   EQU      008h
GF0                   EQU      004h
PD                    EQU      002h
IDL                   EQU      001h

TCON                  DATA     088H     //Timer Control
// (bits in TCON)
TF1                   BIT      TCON.7
TR1                   BIT      TCON.6
TF0                   BIT      TCON.5
TR0                   BIT      TCON.4
IE1                   BIT      TCON.3
IT1                   BIT      TCON.2
IE0                   BIT      TCON.1
IT0                   BIT      TCON.0

TMOD                  DATA     089H     //Timer Mode
// (bits in TMOD)
T1GATE                EQU      080h
T1C_T                 EQU      040h
T1M1                  EQU      020h
T1M0                  EQU      010h
T0GATE                EQU      008h
T0C_T                 EQU      004h
T0M1                  EQU      002h
T0M0                  EQU      001h

TL0                   DATA     08AH     //Timer Low 0

TL1                   DATA     08BH     //Timer Low 1

TH0                   DATA     08CH     //Timer High 0

TH1                   DATA     08DH     //Timer High 1

SFIE                  DATA     08EH     //System Flag INT En.
// (bits in SFIE)
SIDFIE                EQU      080h
MCDRE                 EQU      040h
MCDFIE                EQU      020h
RTCFIE                EQU      010h
BOF1IE                EQU      004h
BOF0IE                EQU      002h
WDTFIE                EQU      001h

XRPS                  DATA     08FH     //XRAM Page Select

P1                    DATA     090H     //Port 1
// (bits in P1)
P17                   BIT      P1.7
P16                   BIT      P1.6
P15                   BIT      P1.5
P14                   BIT      P1.4
P13                   BIT      P1.3
P12                   BIT      P1.2
P11                   BIT      P1.1
P10                   BIT      P1.0

P1M0                  DATA     091H     //P1 Mode Register 0
// (bits in P1M0)
P1M07                 EQU      080h
P1M06                 EQU      040h
P1M05                 EQU      020h
P1M04                 EQU      010h
P1M03                 EQU      008h
P1M02                 EQU      004h
P1M01                 EQU      002h
P1M00                 EQU      001h

P1M1                  DATA     092H     //P1 Mode Register 1
// (bits in P1M1)
P1M17                 EQU      080h
P1M16                 EQU      040h
P1M15                 EQU      020h
P1M14                 EQU      010h
P1M13                 EQU      008h
P1M12                 EQU      004h
P1M11                 EQU      002h
P1M10                 EQU      001h

P2M1                  DATA     092H     //P2 Mode Register 1
// (bits in P2M1)
P2M17                 EQU      080h
P2M16                 EQU      040h
P2M15                 EQU      020h
P2M14                 EQU      010h
P2M13                 EQU      008h
P2M12                 EQU      004h
P2M11                 EQU      002h
P2M10                 EQU      001h

P4M1                  DATA     092H     //P4 Mode Register 1
// (bits in P4M1)
P4M17                 EQU      080h
P4M16                 EQU      040h
P4M15                 EQU      020h
P4M14                 EQU      010h
P4M13                 EQU      008h
P4M12                 EQU      004h
P4M11                 EQU      002h
P4M10                 EQU      001h

P6M1                  DATA     092H     //P6 Mode Register 1
// (bits in P6M1)
P6M13                 EQU      008h
P6M12                 EQU      004h
P6M11                 EQU      002h
P6M10                 EQU      001h

P0M1                  DATA     092H     //P0 Mode Register 1
// (bits in P0M1)
P0M17                 EQU      080h
P0M16                 EQU      040h
P0M15                 EQU      020h
P0M14                 EQU      010h
P0M13                 EQU      008h
P0M12                 EQU      004h
P0M11                 EQU      002h
P0M10                 EQU      001h

P0M0                  DATA     093H     //P0 Mode Register 0
// (bits in P0M0)
P0M07                 EQU      080h
P0M06                 EQU      040h
P0M05                 EQU      020h
P0M04                 EQU      010h
P0M03                 EQU      008h
P0M02                 EQU      004h
P0M01                 EQU      002h
P0M00                 EQU      001h

T2MOD1                DATA     093H     //Timer2 mode 1 Reg.
// (bits in T2MOD1)
TL2CS                 EQU      080h
TF2IG                 EQU      040h
TL2IS                 EQU      020h
T2CKS                 EQU      010h
T2MS1                 EQU      008h
CP2S2                 EQU      004h
CP2S1                 EQU      002h
CP2S0                 EQU      001h

T3MOD1                DATA     093H     //Timer3 mode 1 Reg.
// (bits in T3MOD1)
TL3CS                 EQU      080h
TF3IG                 EQU      040h
T3CKS                 EQU      010h
T3MS1                 EQU      008h
CP3S2                 EQU      004h
CP3S1                 EQU      002h
CP3S0                 EQU      001h

P2M0                  DATA     095H     //P2 Mode Register 0
// (bits in P2M0)
P2M07                 EQU      080h
P2M06                 EQU      040h
P2M05                 EQU      020h
P2M04                 EQU      010h
P2M03                 EQU      008h
P2M02                 EQU      004h
P2M01                 EQU      002h
P2M00                 EQU      001h

TREN0                 DATA     095H     //Timer Run Enable Register 0
// (bits in TREN0)
TR3LE                 EQU      040h
TR2LE                 EQU      020h
TR3E                  EQU      008h
TR2E                  EQU      004h
TR1E                  EQU      002h
TR0E                  EQU      001h

TRLC0                 DATA     095H     //Timer Reload Control Register 0
// (bits in TRLC0)
TL3RLC                EQU      040h
TL2RLC                EQU      020h
T3RLC                 EQU      008h
T2RLC                 EQU      004h
T1RLC                 EQU      002h
T0RLC                 EQU      001h

TSPC0                 DATA     095H     //Timer Stop Control Register 0
// (bits in TSPC0)
TL3SC                 EQU      040h
TL2SC                 EQU      020h
T3SC                  EQU      008h
T2SC                  EQU      004h
T1SC                  EQU      002h
T0SC                  EQU      001h

BOREV                 DATA     096H     //Bit Order Reversed

PCON1                 DATA     097H     //Power Control 1
// (bits in PCON1)
SWRF                  EQU      080h
EXRF                  EQU      040h
MCDF                  EQU      020h
RTCF                  EQU      010h
BOF1                  EQU      004h
BOF0                  EQU      002h
WDTF                  EQU      001h

S0CON                 DATA     098H     //Serial 0 Control
// (bits in S0CON)
SM00_FE               BIT      S0CON.7
SM10                  BIT      S0CON.6
SM20                  BIT      S0CON.5
REN0                  BIT      S0CON.4
TB80                  BIT      S0CON.3
RB80                  BIT      S0CON.2
TI0                   BIT      S0CON.1
RI0                   BIT      S0CON.0

S1CON                 DATA     098H     //Serial 1 Control
// (bits in S1CON)
SM01                  BIT      S1CON.7
SM11                  BIT      S1CON.6
SM21                  BIT      S1CON.5
REN1                  BIT      S1CON.4
TB81                  BIT      S1CON.3
RB81                  BIT      S1CON.2
TI1                   BIT      S1CON.1
RI1                   BIT      S1CON.0

S0BUF                 DATA     099H     //Serial 0 Buffer

S1BUF                 DATA     099H     //Serial 1 Buffer

S0BRT                 DATA     09AH     //S0 Baud-Rate Timer

S1BRT                 DATA     09AH     //S1 Baud-Rate Timer

S0BRC                 DATA     09BH     //S0 Baud-Rate Counter

S1BRC                 DATA     09BH     //S1 Baud-Rate Counter

S0CFG                 DATA     09CH     //S0 Configuration
// (bits in S0CFG)
URTS                  EQU      080h
SMOD2                 EQU      040h
URM0X3                EQU      020h
SM30                  EQU      010h
S0DOR                 EQU      008h
BTI                   EQU      004h
UTIE                  EQU      002h
SMOD3                 EQU      001h

S1CFG                 DATA     09CH     //S1 Configuration
// (bits in S1CFG)
SM31                  EQU      080h
S1M0X3                EQU      040h
S1DOR                 EQU      020h
S1TR                  EQU      010h
S1MOD1                EQU      008h
S1TX12                EQU      004h
S1CKOE                EQU      002h
S1TME                 EQU      001h

S0CFG1                DATA     09DH     //S0 Configuration 1
// (bits in S0CFG1)
SBF0                  EQU      080h
TXER0                 EQU      040h
S0SB16                EQU      020h
ATBR0                 EQU      010h
TXRX0                 EQU      008h
SYNC0                 EQU      004h

AC0CON                DATA     09EH     //AC0 Control Reg.
// (bits in AC0CON)
AC0PDX                EQU      040h
AC0OUT                EQU      020h
AC0F                  EQU      010h
AC0EN                 EQU      008h
AC0INV                EQU      004h
AC0M1                 EQU      002h
AC0M0                 EQU      001h

AC1CON                DATA     09EH     //AC1 Control Reg.
// (bits in AC1CON)
AC1PDX                EQU      040h
AC1OUT                EQU      020h
AC1F                  EQU      010h
AC1EN                 EQU      008h
AC1INV                EQU      004h
AC1M1                 EQU      002h
AC1M0                 EQU      001h

AC0MOD                DATA     09FH     //AC0 Mode Reg.
// (bits in AC0MOD)
NVRS3                 EQU      080h
NVRS2                 EQU      040h
NVRS1                 EQU      020h
NVRS0                 EQU      010h
NVRL                  EQU      008h
AC0FLT                EQU      004h
AC0PIS1               EQU      002h
AC0PIS0               EQU      001h

AC1MOD                DATA     09FH     //AC1 Mode Reg.
// (bits in AC1MOD)
AC1NIS                EQU      010h
NVRL1                 EQU      008h
AC1FLT                EQU      004h

P2                    DATA     0A0H     //Port 2
// (bits in P2)
P27                   BIT      P2.7
P26                   BIT      P2.6
P25                   BIT      P2.5
P24                   BIT      P2.4
P23                   BIT      P2.3
P22                   BIT      P2.2
P21                   BIT      P2.1
P20                   BIT      P2.0

AUXR0                 DATA     0A1H     //Auxiliary Register 0
// (bits in AUXR0)
P60OC1                EQU      080h
P60OC0                EQU      040h
P60FD                 EQU      020h
PBKF                  EQU      010h
BM1F                  EQU      008h
BM0F                  EQU      004h
INT1H                 EQU      002h
INT0H                 EQU      001h

AUXR1                 DATA     0A2H     //Auxiliary Register 1
// (bits in AUXR1)
CRCDS1                EQU      020h
CRCDS0                EQU      010h
DPS                   EQU      001h

AUXR2                 DATA     0A3H     //Auxiliary Register 2
// (bits in AUXR2)
STAF                  EQU      080h
STOF                  EQU      040h
C0PLK                 EQU      010h
T1X12                 EQU      008h
T0X12                 EQU      004h
T1CKOE                EQU      002h
T0CKOE                EQU      001h

AUXR3                 DATA     0A4H     //Auxiliary Register 3
// (bits in AUXR3)
T0PS1                 EQU      080h
T0PS0                 EQU      040h
BPOC1                 EQU      020h
BPOC0                 EQU      010h
S0PS0                 EQU      008h
TWIPS1                EQU      004h
TWIPS0                EQU      002h
T0XL                  EQU      001h

AUXR4                 DATA     0A4H     //Auxiliary Register 4
// (bits in AUXR4)
T2PS1                 EQU      080h
T2PS0                 EQU      040h
T1PS1                 EQU      020h
T1PS0                 EQU      010h
AC1OE                 EQU      008h
AC1FLT1               EQU      004h
AC0OE                 EQU      002h
AC0FLT1               EQU      001h

AUXR5                 DATA     0A4H     //Auxiliary Register 5
// (bits in AUXR5)
C0IC4S0               EQU      080h
C0IC2S0               EQU      040h
C0PPS1                EQU      020h
C0PPS0                EQU      010h
C0PS1                 EQU      008h
C0PS0                 EQU      004h
ECIPS0                EQU      002h
C0COPS                EQU      001h

AUXR6                 DATA     0A4H     //Auxiliary Register 6
// (bits in AUXR6)
KBIHPS1               EQU      080h
KBIHPS0               EQU      040h
KBILPS1               EQU      020h
KBILPS0               EQU      010h
T3FCS                 EQU      008h
T2FCS                 EQU      004h
SnMIPS                EQU      002h
S0COPS                EQU      001h

AUXR7                 DATA     0A4H     //Auxiliary Register 7
// (bits in AUXR7)
POE5                  EQU      080h
POE4                  EQU      040h
C0CKOE                EQU      020h
SPI0M0                EQU      010h
BM1OE1                EQU      008h
BM1OE0                EQU      004h
BM0OE1                EQU      002h
BM0OE0                EQU      001h

AUXR8                 DATA     0A4H     //Auxiliary Register 8
// (bits in AUXR8)
POE7                  EQU      080h
POE6                  EQU      040h
C0PPS2                EQU      020h
SPIPS0                EQU      008h
S1COPS                EQU      004h
T3PS1                 EQU      002h
T3PS0                 EQU      001h

AUXR9                 DATA     0A4H     //Auxiliary Register 9
// (bits in AUXR9)
T1G1                  EQU      020h
T0G1                  EQU      010h
C0FDC1                EQU      008h
C0FDC0                EQU      004h
S1PS1                 EQU      002h
S1PS0                 EQU      001h

EIE2                  DATA     0A5H     //Extended INT Enable 2
// (bits in EIE2)
EAC1                  EQU      002h
ET3                   EQU      001h

EIP2L                 DATA     0A6H     //Ext. INT Priority 2 Low
// (bits in EIP2L)
PAC1L                 EQU      002h
PT3L                  EQU      001h

EIP2H                 DATA     0A7H     //Ext. INT Priority 2 High
// (bits in EIP2H)
PAC1H                 EQU      002h
PT3H                  EQU      001h

IE                    DATA     0A8H     //Interrupt Enable
// (bits in IE)
EA                    BIT      IE.7
ET2                   BIT      IE.5
ES0                   BIT      IE.4
ET1                   BIT      IE.3
EX1                   BIT      IE.2
ET0                   BIT      IE.1
EX0                   BIT      IE.0

SADDR                 DATA     0A9H     //Slave Address

SFRPI                 DATA     0ACH     //SFR Page Index
// (bits in SFRPI)
IDX3                  EQU      008h
IDX2                  EQU      004h
IDX1                  EQU      002h
IDX0                  EQU      001h

EIE1                  DATA     0ADH     //Extended INT Enable 1
// (bits in EIE1)
EAC0                  EQU      080h
ETWI0                 EQU      040h
EKB                   EQU      020h
ES1                   EQU      010h
ESF                   EQU      008h
EPCA                  EQU      004h
EADC                  EQU      002h
ESPI                  EQU      001h

EIP1L                 DATA     0AEH     //Ext. INT Priority 1 Low
// (bits in EIP1L)
PAC0L                 EQU      080h
PTWI0L                EQU      040h
PKBL                  EQU      020h
PS1L                  EQU      010h
PSFL                  EQU      008h
PPCAL                 EQU      004h
PADCL                 EQU      002h
PSPIL                 EQU      001h

EIP1H                 DATA     0AFH     //Ext. INT Priority 1 High
// (bits in EIP1H)
PAC0H                 EQU      080h
PTWI0H                EQU      040h
PKBH                  EQU      020h
PS1H                  EQU      010h
PSFH                  EQU      008h
PPCAH                 EQU      004h
PADCH                 EQU      002h
PSPIH                 EQU      001h

P3                    DATA     0B0H     //Port 3
// (bits in P3)
P37                   BIT      P3.7
P36                   BIT      P3.6
P35                   BIT      P3.5
P34                   BIT      P3.4
P33                   BIT      P3.3
P32                   BIT      P3.2
P31                   BIT      P3.1
P30                   BIT      P3.0

P3M0                  DATA     0B1H     //P3 Mode Register 0
// (bits in P3M0)
P3M07                 EQU      080h
P3M06                 EQU      040h
P3M05                 EQU      020h
P3M04                 EQU      010h
P3M03                 EQU      008h
P3M02                 EQU      004h
P3M01                 EQU      002h
P3M00                 EQU      001h

P3M1                  DATA     0B2H     //P3 Mode Register 1
// (bits in P3M1)
P3M17                 EQU      080h
P3M16                 EQU      040h
P3M15                 EQU      020h
P3M14                 EQU      010h
P3M13                 EQU      008h
P3M12                 EQU      004h
P3M11                 EQU      002h
P3M10                 EQU      001h

P4M0                  DATA     0B3H     //P4 Mode Register 0
// (bits in P4M0)
P4M07                 EQU      080h
P4M06                 EQU      040h
P4M05                 EQU      020h
P4M04                 EQU      010h
P4M03                 EQU      008h
P4M02                 EQU      004h
P4M01                 EQU      002h
P4M00                 EQU      001h

PDRVC0                DATA     0B4H     //Port Driving Control 0
// (bits in PDRVC0)
P3DC1                 EQU      080h
P3DC0                 EQU      040h
P2DC1                 EQU      020h
P2DC0                 EQU      010h
P1DC1                 EQU      008h
P1DC0                 EQU      004h
P0DC1                 EQU      002h
P0DC0                 EQU      001h

PDRVC1                DATA     0B4H     //Port Driving Control 1
// (bits in PDRVC1)
P6DC0                 EQU      010h
P4DC1                 EQU      002h
P4DC0                 EQU      001h

P6M0                  DATA     0B5H     //P6 Mode Register 0
// (bits in P6M0)
P6M03                 EQU      008h
P6M02                 EQU      004h
P6M01                 EQU      002h
P6M00                 EQU      001h

CRC0DA                DATA     0B6H     //CRC0 Data Port

IP0H                  DATA     0B7H     //Interrupt Priority 0 High
// (bits in IP0H)
PX3H                  EQU      080h
PX2H                  EQU      040h
PT2H                  EQU      020h
PSH                   EQU      010h
PT1H                  EQU      008h
PX1H                  EQU      004h
PT0H                  EQU      002h
PX0H                  EQU      001h

IP0L                  DATA     0B8H     //Interrupt Priority Low
// (bits in IP0L)
PX3L                  BIT      IP0L.7
PX2L                  BIT      IP0L.6
PT2L                  BIT      IP0L.5
PSL                   BIT      IP0L.4
PT1L                  BIT      IP0L.3
PX1L                  BIT      IP0L.2
PT0L                  BIT      IP0L.1
PX0L                  BIT      IP0L.0

SADEN                 DATA     0B9H     //Slave Address Mask

S0CR1                 DATA     0B9H     //S0 Control 1
// (bits in S0CR1)
S0TR                  EQU      080h
S0TX12                EQU      040h
S0TCK                 EQU      020h
S0RCK                 EQU      010h
S0CKOE                EQU      008h
ARTE                  EQU      004h

PWMCR                 DATA     0BCH     //PWM Control Reg.
// (bits in PWMCR)
PCAE                  EQU      080h
EXDT                  EQU      040h
PBKM                  EQU      020h
PBKE11                EQU      010h
PBKE10                EQU      008h
PBKE02                EQU      004h
PBKE01                EQU      002h
PBKE00                EQU      001h

PDTCRA                DATA     0BCH     //PWM Dead-Time Control Reg. A
// (bits in PDTCRA)
DTPS1                 EQU      080h
DTPS0                 EQU      040h
DT5                   EQU      020h
DT4                   EQU      010h
DT3                   EQU      008h
DT2                   EQU      004h
DT1                   EQU      002h
DT0                   EQU      001h

BM0CR                 DATA     0BCH     //OBM0 Control Reg.
// (bits in BM0CR)
BM0OUT                EQU      080h
BM0SW                 EQU      040h
BM0IE                 EQU      020h
BM0POL                EQU      010h
M0FLT1                EQU      008h
M0FLT0                EQU      004h
BM0M1                 EQU      002h
BM0M0                 EQU      001h

BM0SE                 DATA     0BCH     //OBM0 Switch Enable Reg.
// (bits in BM0SE)
BM0E13                EQU      080h
BM0E12                EQU      040h
BM0E11                EQU      020h
BM0E10                EQU      010h
BM0E03                EQU      008h
BM0E02                EQU      004h
BM0E01                EQU      002h
BM0E00                EQU      001h

BM0LCR                DATA     0BCH     //OBM0 Low channel Control Reg.
// (bits in BM0LCR)
BM0LCP                EQU      080h
BM0LS3                EQU      008h
BM0LS2                EQU      004h
BM0LS1                EQU      002h
BM0LS0                EQU      001h

BM0HCR                DATA     0BCH     //OBM0 High channel Control Reg.
// (bits in BM0HCR)
BM0HCP                EQU      080h
BM0HS3                EQU      008h
BM0HS2                EQU      004h
BM0HS1                EQU      002h
BM0HS0                EQU      001h

BM1CR                 DATA     0BCH     //OBM1 Control Reg.
// (bits in BM1CR)
BM1OUT                EQU      080h
BM1SW                 EQU      040h
BM1IE                 EQU      020h
BM1POL                EQU      010h
M1FLT1                EQU      008h
M1FLT0                EQU      004h
BM1M1                 EQU      002h
BM1M0                 EQU      001h

BM1SE                 DATA     0BCH     //OBM1 Switch Enable Reg.
// (bits in BM1SE)
BM1E13                EQU      080h
BM1E12                EQU      040h
BM1E11                EQU      020h
BM1E10                EQU      010h
BM1E03                EQU      008h
BM1E02                EQU      004h
BM1E01                EQU      002h
BM1E00                EQU      001h

BM1LCR                DATA     0BCH     //OBM1 Low channel Control Reg.
// (bits in BM1LCR)
BM1LCP                EQU      080h
BM1LS3                EQU      008h
BM1LS2                EQU      004h
BM1LS1                EQU      002h
BM1LS0                EQU      001h

BM1HCR                DATA     0BCH     //OBM1 High channel Control Reg.
// (bits in BM1HCR)
BM1HCP                EQU      080h
BM1HS3                EQU      008h
BM1HS2                EQU      004h
BM1HS1                EQU      002h
BM1HS0                EQU      001h

CKCON1                DATA     0BFH     //Clock Control 1
// (bits in CKCON1)
XTOR                  EQU      080h
XCKS5                 EQU      020h
XCKS4                 EQU      010h
XCKS3                 EQU      008h
XCKS2                 EQU      004h
XCKS1                 EQU      002h
XCKS0                 EQU      001h

XICON                 DATA     0C0H     //External INT Control
// (bits in XICON)
INT3H                 BIT      XICON.7
EX3                   BIT      XICON.6
IE3                   BIT      XICON.5
IT3                   BIT      XICON.4
INT2H                 BIT      XICON.3
EX2                   BIT      XICON.2
IE2                   BIT      XICON.1
IT2                   BIT      XICON.0

XICFG                 DATA     0C1H     //Ext. INT. Configured
// (bits in XICFG)
INT1IS1               EQU      080h
INT1IS0               EQU      040h
INT0IS1               EQU      020h
INT0IS0               EQU      010h
X3FLT                 EQU      008h
X2FLT                 EQU      004h
X1FLT                 EQU      002h
X0FLT                 EQU      001h

XICFG1                DATA     0C1H     //Ext. INT. Configured 1
// (bits in XICFG1)
INT1IS2               EQU      080h
INT0IS2               EQU      040h
INT2IS1               EQU      020h
INT2IS0               EQU      010h
X3FLT1                EQU      008h
X2FLT1                EQU      004h
X1FLT1                EQU      002h
X0FLT1                EQU      001h

XICFG2                DATA     0C1H     //Ext. INT. Configured 2
// (bits in XICFG2)
INT3IS2               EQU      008h
INT3IS1               EQU      004h
INT3IS0               EQU      002h
INT2IS2               EQU      001h

ADCFG0                DATA     0C3H     //ADC Configuration 0
// (bits in ADCFG0)
ADCKS2                EQU      080h
ADCKS1                EQU      040h
ADCKS0                EQU      020h
ADRJ                  EQU      010h
ADTM1                 EQU      002h
ADTM0                 EQU      001h

ADCFG1                DATA     0C3H     //ADC Configuration 1
// (bits in ADCFG1)
SIGN                  EQU      010h
AOS3                  EQU      008h
AOS2                  EQU      004h
AOS1                  EQU      002h
AOS0                  EQU      001h

ADCFG2                DATA     0C3H     //ADC Configuration 2
// (bits in ADCFG2)
SHT7                  EQU      080h
SHT6                  EQU      040h
SHT5                  EQU      020h
SHT4                  EQU      010h
SHT3                  EQU      008h
SHT2                  EQU      004h
SHT1                  EQU      002h
SHT0                  EQU      001h

ADCFG3                DATA     0C3H     //ADC Configuration 3
// (bits in ADCFG3)
ADPS1                 EQU      080h
ADPS0                 EQU      040h
HA                    EQU      020h

ADCFG4                DATA     0C3H     //ADC Configuration 4
// (bits in ADCFG4)
ADTM3                 EQU      020h
ADTM2                 EQU      010h

ADCON0                DATA     0C4H     //ADC Control 0
// (bits in ADCON0)
ADCEN                 EQU      080h
CHS3                  EQU      020h
ADCI                  EQU      010h
ADCS                  EQU      008h
CHS2                  EQU      004h
CHS1                  EQU      002h
CHS0                  EQU      001h

ADCDL                 DATA     0C5H     //ADC Data Low
// (bits in ADCDL)
ADCV1                 EQU      080h
ADCV0                 EQU      040h

ADCDH                 DATA     0C6H     //ADC Data High
// (bits in ADCDH)
ADCV9                 EQU      080h
ADCV8                 EQU      040h
ADCV7                 EQU      020h
ADCV6                 EQU      010h
ADCV5                 EQU      008h
ADCV4                 EQU      004h
ADCV3                 EQU      002h
ADCV2                 EQU      001h

CKCON0                DATA     0C7H     //Clock Control 0
// (bits in CKCON0)
AFS                   EQU      080h
ENCKM                 EQU      040h
CKMIS1                EQU      020h
CKMIS0                EQU      010h
CCKS                  EQU      008h
SCKS2                 EQU      004h
SCKS1                 EQU      002h
SCKS0                 EQU      001h

T2CON                 DATA     0C8H     //Timer 2 Control Reg.
// (bits in T2CON)
TF2                   BIT      T2CON.7
EXF2                  BIT      T2CON.6
RCLK_TF2L             BIT      T2CON.5
TCLK_TL2IE            BIT      T2CON.4
EXEN2                 BIT      T2CON.3
TR2                   BIT      T2CON.2
C_T2                  BIT      T2CON.1
CP_RL2                BIT      T2CON.0

T3CON                 DATA     0C8H     //Timer 3 Control Reg.
// (bits in T3CON)
TF3                   BIT      T3CON.7
EXF3                  BIT      T3CON.6
TF3L                  BIT      T3CON.5
TL3IE                 BIT      T3CON.4
EXEN3                 BIT      T3CON.3
TR3                   BIT      T3CON.2
C_T3                  BIT      T3CON.1
CP_RL3                BIT      T3CON.0

T2MOD                 DATA     0C9H     //Timer 2 mode Reg.
// (bits in T2MOD)
T2SPL                 EQU      080h
TL2X12                EQU      040h
T2EXH                 EQU      020h
T2X12                 EQU      010h
TR2L                  EQU      008h
TR2LC                 EQU      004h
T2OE                  EQU      002h
T2MS0                 EQU      001h

T3MOD                 DATA     0C9H     //Timer 3 mode Reg.
// (bits in T3MOD)
T3SPL                 EQU      080h
TL3X12                EQU      040h
T3EXH                 EQU      020h
T3X12                 EQU      010h
TR3L                  EQU      008h
TR3LC                 EQU      004h
T3OE                  EQU      002h
T3MS0                 EQU      001h

RCAP2L                DATA     0CAH     //Timer2 Capture Low

RCAP3L                DATA     0CAH     //Timer3 Capture Low

RCAP2H                DATA     0CBH     //Timer2 Capture High

RCAP3H                DATA     0CBH     //Timer3 Capture High

TL2                   DATA     0CCH     //Timer Low 2

TL3                   DATA     0CCH     //Timer Low 3

TH2                   DATA     0CDH     //Timer High 2

TH3                   DATA     0CDH     //Timer High 3

CLRL                  DATA     0CEH     //CL Reload register

CHRL                  DATA     0CFH     //CH Reload register

PSW                   DATA     0D0H     //Program Status Word
// (bits in PSW)
CY                    BIT      PSW.7
AC                    BIT      PSW.6
F0                    BIT      PSW.5
RS1                   BIT      PSW.4
RS0                   BIT      PSW.3
OV                    BIT      PSW.2
F1                    BIT      PSW.1
P                     BIT      PSW.0

SIADR                 DATA     0D1H     //TWI0/I2C0 Address Reg.
// (bits in SIADR)
GC                    EQU      001h

SIDAT                 DATA     0D2H     //TWI0/I2C0 Data Reg.

SISTA                 DATA     0D3H     //TWI0/I2C0 Status Reg.

SICON                 DATA     0D4H     //TWI0/I2C0 Control Reg.
// (bits in SICON)
CR2                   EQU      080h
ENSI                  EQU      040h
STA                   EQU      020h
STO                   EQU      010h
SI                    EQU      008h
AA                    EQU      004h
CR1                   EQU      002h
CR0                   EQU      001h

KBPATN                DATA     0D5H     //Keypad Pattern

KBCON                 DATA     0D6H     //Keypad Control
// (bits in KBCON)
KBCS1                 EQU      080h
KBCS0                 EQU      040h
KBES                  EQU      020h
PATN_SEL              EQU      002h
KBIF                  EQU      001h

KBMASK                DATA     0D7H     //Keypad Int. Mask

CCON                  DATA     0D8H     //PCA Control Reg.
// (bits in CCON)
CF                    BIT      CCON.7
CR                    BIT      CCON.6
CCF5                  BIT      CCON.5
CCF4                  BIT      CCON.4
CCF3                  BIT      CCON.3
CCF2                  BIT      CCON.2
CCF1                  BIT      CCON.1
CCF0                  BIT      CCON.0

CMOD                  DATA     0D9H     //PCA Mode Reg.
// (bits in CMOD)
CIDL                  EQU      080h
BME4                  EQU      040h
BME2                  EQU      020h
BME0                  EQU      010h
CPS2                  EQU      008h
CPS1                  EQU      004h
CPS0                  EQU      002h
ECF                   EQU      001h

CCAPM0                DATA     0DAH     //PCA Module0 Mode
// (bits in CCAPM0)
DTE0                  EQU      080h
ECOM0                 EQU      040h
CAPP0                 EQU      020h
CAPN0                 EQU      010h
MAT0                  EQU      008h
TOG0                  EQU      004h
PWM0                  EQU      002h
ECCF0                 EQU      001h

CCAPM6                DATA     0DAH     //PCA Module6 Mode
// (bits in CCAPM6)
BME6                  EQU      080h
ECOM6                 EQU      040h
CAPN6                 EQU      010h
MAT6                  EQU      008h
TOG6                  EQU      004h
PWM6                  EQU      002h
ECCF6                 EQU      001h

CCAPM1                DATA     0DBH     //PCA Module1 Mode
// (bits in CCAPM1)
ECOM1                 EQU      040h
CAPP1                 EQU      020h
CAPN1                 EQU      010h
MAT1                  EQU      008h
TOG1                  EQU      004h
PWM1                  EQU      002h
ECCF1                 EQU      001h

CCAPM7                DATA     0DBH     //PCA Module7 Mode
// (bits in CCAPM7)
ECOM7                 EQU      040h
CAPN7                 EQU      010h
MAT7                  EQU      008h
TOG7                  EQU      004h
PWM7                  EQU      002h
ECCF7                 EQU      001h

CCAPM2                DATA     0DCH     //PCA Module2 Mode
// (bits in CCAPM2)
DTE2                  EQU      080h
ECOM2                 EQU      040h
CAPP2                 EQU      020h
CAPN2                 EQU      010h
MAT2                  EQU      008h
TOG2                  EQU      004h
PWM2                  EQU      002h
ECCF2                 EQU      001h

CCAPM3                DATA     0DDH     //PCA Module3 Mode
// (bits in CCAPM3)
ECOM3                 EQU      040h
CAPP3                 EQU      020h
CAPN3                 EQU      010h
MAT3                  EQU      008h
TOG3                  EQU      004h
PWM3                  EQU      002h
ECCF3                 EQU      001h

CCAPM4                DATA     0DEH     //PCA Module4 Mode
// (bits in CCAPM4)
DTE4                  EQU      080h
ECOM4                 EQU      040h
CAPP4                 EQU      020h
CAPN4                 EQU      010h
MAT4                  EQU      008h
TOG4                  EQU      004h
PWM4                  EQU      002h
ECCF4                 EQU      001h

CCAPM5                DATA     0DFH     //PCA Module5 Mode
// (bits in CCAPM5)
ECOM5                 EQU      040h
CAPP5                 EQU      020h
CAPN5                 EQU      010h
MAT5                  EQU      008h
TOG5                  EQU      004h
PWM5                  EQU      002h
ECCF5                 EQU      001h

ACC                   DATA     0E0H     //Accumulator

WDTCR                 DATA     0E1H     //WDT Control register
// (bits in WDTCR)
WREN                  EQU      080h
NSW                   EQU      040h
ENW                   EQU      020h
CLRW                  EQU      010h
WIDL                  EQU      008h
PS2                   EQU      004h
PS1                   EQU      002h
PS0                   EQU      001h

IFD                   DATA     0E2H     //ISP Flash data

IFADRH                DATA     0E3H     //ISP Flash Addr. High

IFADRL                DATA     0E4H     //ISP Flash Addr. Low

IFMT                  DATA     0E5H     //ISP Mode Table
// (bits in IFMT)
MS7                   EQU      080h
MS3                   EQU      008h
MS2                   EQU      004h
MS1                   EQU      002h
MS0                   EQU      001h

SCMD                  DATA     0E6H     //ISP Serial Command

ISPCR                 DATA     0E7H     //ISP Control Register
// (bits in ISPCR)
ISPEN                 EQU      080h
SWBS                  EQU      040h
SRST                  EQU      020h
CFAIL                 EQU      010h

P4                    DATA     0E8H     //Port 4
// (bits in P4)
P47                   BIT      P4.7
P46                   BIT      P4.6
P45                   BIT      P4.5
P44                   BIT      P4.4
P43                   BIT      P4.3
P42                   BIT      P4.2
P41                   BIT      P4.1
P40                   BIT      P4.0

CL                    DATA     0E9H     //PCA base timer Low

CCAP0L                DATA     0EAH     //PCA module0 capture Low

CCAP6L                DATA     0EAH     //PCA module6 capture Low

CCAP1L                DATA     0EBH     //PCA module1 capture Low

CCAP7L                DATA     0EBH     //PCA module7 capture Low

CCAP2L                DATA     0ECH     //PCA module2 capture Low

CCAP3L                DATA     0EDH     //PCA module3 capture Low

CCAP4L                DATA     0EEH     //PCA module4 capture Low

CCAP5L                DATA     0EFH     //PCA module5 capture Low

B                     DATA     0F0H     //B Register

PAOE                  DATA     0F1H     //PWM Additional Output Enable
// (bits in PAOE)
POE3                  EQU      080h
POE2B                 EQU      040h
POE2A                 EQU      020h
POE2                  EQU      010h
POE1                  EQU      008h
POE0B                 EQU      004h
POE0A                 EQU      002h
POE0                  EQU      001h

PCAPWM0               DATA     0F2H     //PCA PWM0 Mode
// (bits in PCAPWM0)
P0RS1                 EQU      080h
P0RS0                 EQU      040h
P0INV                 EQU      004h
EPC0H                 EQU      002h
EPC0L                 EQU      001h

PCAPWM6               DATA     0F2H     //PCA PWM6 Mode
// (bits in PCAPWM6)
P6RS1                 EQU      080h
P6RS0                 EQU      040h
CCF6                  EQU      008h
P6INV                 EQU      004h
EPC6H                 EQU      002h
EPC6L                 EQU      001h

PCAPWM1               DATA     0F3H     //PCA PWM1 Mode
// (bits in PCAPWM1)
P1RS1                 EQU      080h
P1RS0                 EQU      040h
P1INV                 EQU      004h
EPC1H                 EQU      002h
EPC1L                 EQU      001h

PCAPWM7               DATA     0F3H     //PCA PWM7 Mode
// (bits in PCAPWM7)
P7RS1                 EQU      080h
P7RS0                 EQU      040h
CCF7                  EQU      008h
P7INV                 EQU      004h
EPC7H                 EQU      002h
EPC7L                 EQU      001h

PCAPWM2               DATA     0F4H     //PCA PWM2 Mode
// (bits in PCAPWM2)
P2RS1                 EQU      080h
P2RS0                 EQU      040h
P2INV                 EQU      004h
EPC2H                 EQU      002h
EPC2L                 EQU      001h

PCAPWM3               DATA     0F5H     //PCA PWM3 Mode
// (bits in PCAPWM3)
P3RS1                 EQU      080h
P3RS0                 EQU      040h
P3INV                 EQU      004h
EPC3H                 EQU      002h
EPC3L                 EQU      001h

PCAPWM4               DATA     0F6H     //PCA PWM4 Mode
// (bits in PCAPWM4)
P4RS1                 EQU      080h
P4RS0                 EQU      040h
P4INV                 EQU      004h
EPC4H                 EQU      002h
EPC4L                 EQU      001h

PCAPWM5               DATA     0F7H     //PCA PWM5 Mode
// (bits in PCAPWM5)
P5RS1                 EQU      080h
P5RS0                 EQU      040h
P5INV                 EQU      004h
EPC5H                 EQU      002h
EPC5L                 EQU      001h

P6                    DATA     0F8H     //Port 6
// (bits in P6)
P63                   BIT      P6.3
P62                   BIT      P6.2
P61                   BIT      P6.1
P60                   BIT      P6.0

CH                    DATA     0F9H     //PCA base timer High

CCAP0H                DATA     0FAH     //PCA Module0 capture High

CCAP6H                DATA     0FAH     //PCA Module6 capture High

CCAP1H                DATA     0FBH     //PCA Module1 capture High

CCAP7H                DATA     0FBH     //PCA Module7 capture High

CCAP2H                DATA     0FCH     //PCA Module2 capture High

CCAP3H                DATA     0FDH     //PCA Module3 capture High

CCAP4H                DATA     0FEH     //PCA Module4 capture High

CCAP5H                DATA     0FFH     //PCA Module5 capture High


//===== Page P =====//
IAPLB_P               EQU      003h     //IAP Low Boundary
// (bits in IAPLB)
IAPLB6_P              EQU      080h
IAPLB5_P              EQU      040h
IAPLB4_P              EQU      020h
IAPLB3_P              EQU      010h
IAPLB2_P              EQU      008h
IAPLB1_P              EQU      004h
IAPLB0_P              EQU      002h

CKCON2_P              EQU      040h     //Clock Control 2
// (bits in CKCON2)
XTGS1_P               EQU      080h
XTGS0_P               EQU      040h
XTALE_P               EQU      020h
IHRCOE_P              EQU      010h
MCKS1_P               EQU      008h
MCKS0_P               EQU      004h
OSCS1_P               EQU      002h
OSCS0_P               EQU      001h

CKCON3_P              EQU      041h     //Clock Control 3
// (bits in CKCON3)
WDTCS1_P              EQU      080h
WDTCS0_P              EQU      040h
FWKP_P                EQU      020h
WDTFS_P               EQU      010h
MCKD1_P               EQU      008h
MCKD0_P               EQU      004h
MCDS1_P               EQU      002h
MCDS0_P               EQU      001h

CKCON4_P              EQU      042h     //Clock Control 4
// (bits in CKCON4)
RCSS2_P               EQU      080h
RCSS1_P               EQU      040h
RCSS0_P               EQU      020h
RPSC2_P               EQU      010h
RPSC1_P               EQU      008h
RPSC0_P               EQU      004h
RTCCS3_P              EQU      002h
RTCCS2_P              EQU      001h

PCON2_P               EQU      044h     //Power Control 2
// (bits in PCON2)
AWBOD1_P              EQU      080h
BO1S1_P               EQU      020h
BO1S0_P               EQU      010h
BO1RE_P               EQU      008h
EBOD1_P               EQU      004h
BO0RE_P               EQU      002h

PCON3_P               EQU      045h     //Power Control 3
// (bits in PCON3)
IVREN_P               EQU      080h

SPCON0_P              EQU      048h     //SFR Page Control 0
// (bits in SPCON0)
P6CTL_P               EQU      040h
P4CTL_P               EQU      020h
WRCTL_P               EQU      010h
CKCTL1_P              EQU      008h
CKCTL0_P              EQU      004h
PWCTL1_P              EQU      002h
PWCTL0_P              EQU      001h

DCON0_P               EQU      04Ch     //Device Control 0
// (bits in DCON0)
HSE_P                 EQU      080h
IAPO_P                EQU      040h
HSE1_P                EQU      020h
IORCTL_P              EQU      004h
RSTIO_P               EQU      002h
OCDE_P                EQU      001h

RTCCR_P               EQU      054h     //RTC Control Reg.
// (bits in RTCCR)
RTCE_P                EQU      080h
RTCO_P                EQU      040h
RTCRL5_P              EQU      020h
RTCRL4_P              EQU      010h
RTCRL3_P              EQU      008h
RTCRL2_P              EQU      004h
RTCRL1_P              EQU      002h
RTCRL0_P              EQU      001h

RTCTM_P               EQU      055h     //RTC Timer Register
// (bits in RTCTM)
RTCCS1_P              EQU      080h
RTCCS0_P              EQU      040h
RTCCT5_P              EQU      020h
RTCCT4_P              EQU      010h
RTCCT3_P              EQU      008h
RTCCT2_P              EQU      004h
RTCCT1_P              EQU      002h
RTCCT0_P              EQU      001h

PCON0_P               EQU      087h     //Power Control 0

PCON1_P               EQU      097h     //Power Control 1

CKCON1_P              EQU      0BFh     //Clock Control 1

CKCON0_P              EQU      0C7h     //Clock Control 0

WDTCR_P               EQU      0E1h     //Watch-dog-timer Control register

P4_P                  EQU      0E8h     //Port 4
// (bits in P4)
P47_P                 EQU      080h
P46_P                 EQU      040h
P45_P                 EQU      020h
P44_P                 EQU      010h
P43_P                 EQU      008h
P42_P                 EQU      004h
P41_P                 EQU      002h
P40_P                 EQU      001h

P6_P                  EQU      0F8h     //Port 6
// (bits in P6)
P63_P                 EQU      008h
P62_P                 EQU      004h
P61_P                 EQU      002h
P60_P                 EQU      001h

#endif
