MG32L003 Standard Peripherals Firmware Library

宏定义
LVD_Filter_Clock_Selection
MG32L003_StdPeriph_Driver » LVD » LVD_Exported_constants

## 宏定义
#define | LVD_FLTCLK_DISABLE (0x00000000U)
#define | LVD_FLTCLK_PCLK (LVD_CR_FLTCLK_SEL_0)
#define | LVD_FLTCLK_LSI (LVD_CR_FLTCLK_SEL_1)
#define | IS_LVD_FLTCLK(FLTCLK)
#define | IS_LVD_FLTNUM(FLTNUM) (((FLTNUM) >= 0U) && ((FLTNUM) <= 0xFFFFU))

## 详细描述

## 宏定义说明

## ◆ IS_LVD_FLTCLK

#define IS_LVD_FLTCLK | ( |  | FLTCLK | ) |

值:
(((FLTCLK) == LVD_FLTCLK_DISABLE) || \
((FLTCLK) == LVD_FLTCLK_PCLK) || \
((FLTCLK) == LVD_FLTCLK_LSI))
LVD_FLTCLK_PCLK
#define LVD_FLTCLK_PCLK
Definition: mg32l003_lvd.h:60
LVD_FLTCLK_LSI
#define LVD_FLTCLK_LSI
Definition: mg32l003_lvd.h:61
LVD_FLTCLK_DISABLE
#define LVD_FLTCLK_DISABLE
Definition: mg32l003_lvd.h:59

## ◆ LVD_FLTCLK_DISABLE

#define LVD_FLTCLK_DISABLE (0x00000000U)

Digital filter clock select

## ◆ LVD_FLTCLK_LSI

#define LVD_FLTCLK_LSI (LVD_CR_FLTCLK_SEL_1)

Digital filter clock select LSI

## ◆ LVD_FLTCLK_PCLK

#define LVD_FLTCLK_PCLK (LVD_CR_FLTCLK_SEL_0)

Digital filter clock select PCLK