MG32L003 Standard Peripherals Firmware Library

结构体 | 宏定义 | 函数
mg32l003_adc.h 文件参考

This file contains all the functions prototypes for the ADC firmware library. 更多...

`#include "mg32l003.h"`

浏览源代码.

## 结构体
struct | ADC_InitTypeDef
| ADC Init structure definition 更多...

## 宏定义
#define | ADC_SAMPLE_4CYCLE 0x00U
#define | ADC_SAMPLE_8CYCLE 0x800UL
#define | IS_ADC_SAMPLE_CYCLE(CYLCE) (((CYLCE) == ADC_SAMPLE_4CYCLE) || ((CYLCE) == ADC_SAMPLE_8CYCLE))
#define | ADC_SINGLE_CHANNEL_0 (0x00000000U)
#define | ADC_SINGLE_CHANNEL_1 (ADC_CR0_SEL_0)
#define | ADC_SINGLE_CHANNEL_2 (ADC_CR0_SEL_1)
#define | ADC_SINGLE_CHANNEL_3 (ADC_CR0_SEL_1 | ADC_CR0_SEL_0)
#define | ADC_SINGLE_CHANNEL_4 (ADC_CR0_SEL_2)
#define | ADC_SINGLE_CHANNEL_5 (ADC_CR0_SEL_2 | ADC_CR0_SEL_0)
#define | ADC_SINGLE_CHANNEL_6 (ADC_CR0_SEL_2 | ADC_CR0_SEL_1)
#define | ADC_SINGLE_CHANNEL_7 (ADC_CR0_SEL_2 | ADC_CR0_SEL_1 | ADC_CR0_SEL_0)
#define | ADC_SINGLE_CHANNEL_8 (ADC_CR0_SEL_3)
#define | ADC_SINGLE_CHANNEL_9 (ADC_CR0_SEL_3 | ADC_CR0_SEL_0)
#define | ADC_SINGLE_CHANNEL_10 (ADC_CR0_SEL_3 | ADC_CR0_SEL_1)
#define | ADC_SINGLE_CHANNEL_11 (ADC_CR0_SEL_3 | ADC_CR0_SEL_1 | ADC_CR0_SEL_0)
#define | ADC_SINGLE_CHANNEL_12 (ADC_CR0_SEL_3 | ADC_CR0_SEL_2)
#define | ADC_SINGLE_CHANNEL_13 (ADC_CR0_SEL_3 | ADC_CR0_SEL_2 | ADC_CR0_SEL_0)
#define | ADC_SINGLE_CHANNEL_14 (ADC_CR0_SEL_3 | ADC_CR0_SEL_2 | ADC_CR0_SEL_1)
#define | ADC_SINGLE_CHANNEL_15 (ADC_CR0_SEL_3 | ADC_CR0_SEL_2 | ADC_CR0_SEL_1 | ADC_CR0_SEL_0)
#define | IS_ADC_SINGLE_CHANNEL(CHANNEL)
#define | ADC_CLOCK_PCLK_DIV1 (0x00000000U)
#define | ADC_CLOCK_PCLK_DIV2 (ADC_CR0_CLKSEL_0)
#define | ADC_CLOCK_PCLK_DIV4 (ADC_CR0_CLKSEL_1)
#define | ADC_CLOCK_PCLK_DIV8 (ADC_CR0_CLKSEL_1 | ADC_CR0_CLKSEL_0)
#define | ADC_CLOCK_PCLK_DIV16 (ADC_CR0_CLKSEL_2)
#define | ADC_CLOCK_PCLK_DIV32 (ADC_CR0_CLKSEL_2 | ADC_CR0_CLKSEL_0)
#define | ADC_CLOCK_PCLK_DIV64 (ADC_CR0_CLKSEL_2 | ADC_CR0_CLKSEL_1)
#define | ADC_CLOCK_PCLK_DIV128 (ADC_CR0_CLKSEL_2 | ADC_CR0_CLKSEL_1 | ADC_CR0_CLKSEL_0)
#define | IS_ADC_CLOCK_PCLK_DIV(CLOCK)
#define | ADC_MODE_SINGLE (0x00000000U)
#define | ADC_MODE_CONTINUE (ADC_CR1_CT)
#define | IS_ADC_SINGLEMODE(MODE) (((MODE) == ADC_MODE_SINGLE) || ((MODE) == ADC_MODE_CONTINUE))
#define | ADC_None_Threshold_Compare (0x00000000)
#define | ADC_Low_Threshold_Compare (0x01 << 12)
#define | ADC_High_Threshold_Compare (0x01 << 13)
#define | ADC_Range_Threshold_Compare (0x01 << 14)
#define | ADC_Threshold_Comapre_Mask (ADC_Low_Threshold_Compare | ADC_High_Threshold_Compare | ADC_Range_Threshold_Compare)
#define | ADC_Threshold_Compare_All ADC_Threshold_Comapre_Mask
#define | ADC_AUTOACC_DISABLE (0x00000000U)
#define | ADC_AUTOACC_ENABLE (ADC_CR1_RACC_EN)
#define | IS_ADC_ACCMULATION(ACC) (((ACC) == ADC_AUTOACC_ENABLE) || ((ACC) == ADC_AUTOACC_DISABLE))
#define | ADC_MULTICHANNEL_NONCIRCLE (0x00000000U)
#define | ADC_MULTICHANNEL_CIRCLE (ADC_CR2_CIRCLE_MODE)
#define | IS_ADC_CIRCLEMODE(MODE) (((MODE) == ADC_MULTICHANNEL_NONCIRCLE) || ((MODE) == ADC_MULTICHANNEL_CIRCLE))
#define | ADC_CONTINUE_CHANNEL_0 (ADC_CR2_CHEN_0)
#define | ADC_CONTINUE_CHANNEL_1 (ADC_CR2_CHEN_1)
#define | ADC_CONTINUE_CHANNEL_2 (ADC_CR2_CHEN_2)
#define | ADC_CONTINUE_CHANNEL_3 (ADC_CR2_CHEN_3)
#define | ADC_CONTINUE_CHANNEL_4 (ADC_CR2_CHEN_4)
#define | ADC_CONTINUE_CHANNEL_5 (ADC_CR2_CHEN_5)
#define | ADC_CONTINUE_CHANNEL_6 (ADC_CR2_CHEN_6)
#define | ADC_CONTINUE_CHANNEL_7 (ADC_CR2_CHEN_7)
#define | ADC_CONTINUE_CHANNEL_8 (ADC_CR2_CHEN_8 )
#define | ADC_CONTINUE_CHANNEL_9 (ADC_CR2_CHEN_9 )
#define | ADC_CONTINUE_CHANNEL_10 (ADC_CR2_CHEN_10)
#define | ADC_CONTINUE_CHANNEL_11 (ADC_CR2_CHEN_11)
#define | ADC_CONTINUE_CHANNEL_12 (ADC_CR2_CHEN_12)
#define | ADC_CONTINUE_CHANNEL_13 (ADC_CR2_CHEN_13)
#define | ADC_CONTINUE_CHANNEL_14 (ADC_CR2_CHEN_14)
#define | ADC_CONTINUE_CHANNEL_15 (ADC_CR2_CHEN_15)
#define | ADC_CONTINUE_CHANNEL_ALL (0x0FF000FF)
#define | IS_ADC_CONTINUE_CHANNEL(CHANNEL) (((CHANNEL) & ADC_CONTINUE_CHANNEL_ALL) != 0x0000)
#define | IS_ADC_CHANNEL(CHANNEL) ((IS_ADC_SINGLE_CHANNEL(CHANNEL)) || (IS_ADC_CONTINUE_CHANNEL(CHANNEL)))
#define | ADC_IT_CONTINUE ADC_INTEN_CONT_IEN
#define | ADC_IT_RANGE_THRESHOLD ADC_INTEN_REG_IEN
#define | ADC_IT_HIGH_THRESHOLD ADC_INTEN_HHT_IEN
#define | ADC_IT_LOW_THRESHOLD ADC_INTEN_LLT_IEN
#define | ADC_IT_CHANNEL15 ADC_INTEN_ADCXIEN_15
#define | ADC_IT_CHANNEL14 ADC_INTEN_ADCXIEN_14
#define | ADC_IT_CHANNEL13 ADC_INTEN_ADCXIEN_13
#define | ADC_IT_CHANNEL12 ADC_INTEN_ADCXIEN_12
#define | ADC_IT_CHANNEL11 ADC_INTEN_ADCXIEN_11
#define | ADC_IT_CHANNEL10 ADC_INTEN_ADCXIEN_10
#define | ADC_IT_CHANNEL9 ADC_INTEN_ADCXIEN_9
#define | ADC_IT_CHANNEL8 ADC_INTEN_ADCXIEN_8
#define | ADC_IT_CHANNEL7 ADC_INTEN_ADCXIEN_7
#define | ADC_IT_CHANNEL6 ADC_INTEN_ADCXIEN_6
#define | ADC_IT_CHANNEL5 ADC_INTEN_ADCXIEN_5
#define | ADC_IT_CHANNEL4 ADC_INTEN_ADCXIEN_4
#define | ADC_IT_CHANNEL3 ADC_INTEN_ADCXIEN_3
#define | ADC_IT_CHANNEL2 ADC_INTEN_ADCXIEN_2
#define | ADC_IT_CHANNEL1 ADC_INTEN_ADCXIEN_1
#define | ADC_IT_CHANNEL0 ADC_INTEN_ADCXIEN_0
#define | ADC_IT_MASK (0xFFFFFUL)
#define | IS_ADC_IT(ADC_IT) (((ADC_IT) & ADC_IT_MASK) != 0x00000)
#define | ADC_RAWINTFLAG ADC_RAWINTSR_CONT_INTF
#define | ADC_RAWINTFLAG_RANGE_THRESHOLD ADC_RAWINTSR_REG_INTF
#define | ADC_RAWINTFLAG_HIGH_THRESHOLD ADC_RAWINTSR_HHT_INTF
#define | ADC_RAWINTFLAG_LOW_THERSHOLD ADC_RAWINTSR_LLT_INTF
#define | ADC_RAWINTFLAG_CHANNEL15 ADC_RAWINTSR_ADCRIS_15
#define | ADC_RAWINTFLAG_CHANNEL14 ADC_RAWINTSR_ADCRIS_14
#define | ADC_RAWINTFLAG_CHANNEL13 ADC_RAWINTSR_ADCRIS_13
#define | ADC_RAWINTFLAG_CHANNEL12 ADC_RAWINTSR_ADCRIS_12
#define | ADC_RAWINTFLAG_CHANNEL11 ADC_RAWINTSR_ADCRIS_11
#define | ADC_RAWINTFLAG_CHANNEL10 ADC_RAWINTSR_ADCRIS_10
#define | ADC_RAWINTFLAG_CHANNEL9 ADC_RAWINTSR_ADCRIS_9
#define | ADC_RAWINTFLAG_CHANNEL8 ADC_RAWINTSR_ADCRIS_8
#define | ADC_RAWINTFLAG_CHANNEL7 ADC_RAWINTSR_ADCRIS_7
#define | ADC_RAWINTFLAG_CHANNEL6 ADC_RAWINTSR_ADCRIS_6
#define | ADC_RAWINTFLAG_CHANNEL5 ADC_RAWINTSR_ADCRIS_5
#define | ADC_RAWINTFLAG_CHANNEL4 ADC_RAWINTSR_ADCRIS_4
#define | ADC_RAWINTFLAG_CHANNEL3 ADC_RAWINTSR_ADCRIS_3
#define | ADC_RAWINTFLAG_CHANNEL2 ADC_RAWINTSR_ADCRIS_2
#define | ADC_RAWINTFLAG_CHANNEL1 ADC_RAWINTSR_ADCRIS_1
#define | ADC_RAWINTFLAG_CHANNEL0 ADC_RAWINTSR_ADCRIS_0
#define | ADC_RAWINTFLAG_CHANNEL_ALL
#define | IS_ADC_RAWINTFLAG(FLAG)
#define | ADC_INTFLAG ADC_MSKINTSR_CONT_MIF
#define | ADC_INTFLAG_RANGE_THRESHOLD ADC_MSKINTSR_REG_MIF
#define | ADC_INTFLAG_HIGH_THRESHOLD ADC_MSKINTSR_HHT_MIF
#define | ADC_INTFLAG_LOW_THERSHOLD ADC_MSKINTSR_LLT_MIF
#define | ADC_INTFLAG_CHANNEL15 ADC_MSKINTSR_ADCMIS_15
#define | ADC_INTFLAG_CHANNEL14 ADC_MSKINTSR_ADCMIS_14
#define | ADC_INTFLAG_CHANNEL13 ADC_MSKINTSR_ADCMIS_13
#define | ADC_INTFLAG_CHANNEL12 ADC_MSKINTSR_ADCMIS_12
#define | ADC_INTFLAG_CHANNEL11 ADC_MSKINTSR_ADCMIS_11
#define | ADC_INTFLAG_CHANNEL10 ADC_MSKINTSR_ADCMIS_10
#define | ADC_INTFLAG_CHANNEL9 ADC_MSKINTSR_ADCMIS_9
#define | ADC_INTFLAG_CHANNEL8 ADC_MSKINTSR_ADCMIS_8
#define | ADC_INTFLAG_CHANNEL7 ADC_MSKINTSR_ADCMIS_7
#define | ADC_INTFLAG_CHANNEL6 ADC_MSKINTSR_ADCMIS_6
#define | ADC_INTFLAG_CHANNEL5 ADC_MSKINTSR_ADCMIS_5
#define | ADC_INTFLAG_CHANNEL4 ADC_MSKINTSR_ADCMIS_4
#define | ADC_INTFLAG_CHANNEL3 ADC_MSKINTSR_ADCMIS_3
#define | ADC_INTFLAG_CHANNEL2 ADC_MSKINTSR_ADCMIS_2
#define | ADC_INTFLAG_CHANNEL1 ADC_MSKINTSR_ADCMIS_1
#define | ADC_INTFLAG_CHANNEL0 ADC_MSKINTSR_ADCMIS_0
#define | ADC_INTFLAG_CHANNEL_ALL
#define | IS_ADC_INTFLAG(FLAG)
#define | ADC_SOFTWARE_START (0x00000000U)
#define | ADC_EXTTRIG1_TIM10 (ADC_CR1_TRIGS0_0)
#define | ADC_EXTTRIG1_TIM11 (ADC_CR1_TRIGS0_1)
#define | ADC_EXTTRIG1_TIM1 (ADC_CR1_TRIGS0_1 | ADC_CR1_TRIGS0_0)
#define | ADC_EXTTRIG1_LPTIM (ADC_CR1_TRIGS0_2)
#define | ADC_EXTTRIG1_TIM1_TRGO (ADC_CR1_TRIGS0_2 | ADC_CR1_TRIGS0_0)
#define | ADC_EXTTRIG1_TIM2_TRGO (ADC_CR1_TRIGS0_2 | ADC_CR1_TRIGS0_1)
#define | ADC_EXTTRIG1_TIM2_INT (ADC_CR1_TRIGS0_2 | ADC_CR1_TRIGS0_1 | ADC_CR1_TRIGS0_0)
#define | ADC_EXTTRIG1_UART1_INT (ADC_CR1_TRIGS0_3)
#define | ADC_EXTTRIG1_UART2_INT (ADC_CR1_TRIGS0_3 | ADC_CR1_TRIGS0_0)
#define | ADC_EXTTRIG1_LPUART_INT (ADC_CR1_TRIGS0_3 | ADC_CR1_TRIGS0_1)
#define | ADC_EXTTRIG1_VC0_INT (ADC_CR1_TRIGS0_3 | ADC_CR1_TRIGS0_1 | ADC_CR1_TRIGS0_0)
#define | ADC_EXTTRIG1_NC (ADC_CR1_TRIGS0_3 | ADC_CR1_TRIGS0_2)
#define | ADC_EXTTRIG1_RTC_INT (ADC_CR1_TRIGS0_3 | ADC_CR1_TRIGS0_2 | ADC_CR1_TRIGS0_0)
#define | ADC_EXTTRIG1_PCA_INT (ADC_CR1_TRIGS0_3 | ADC_CR1_TRIGS0_2 | ADC_CR1_TRIGS0_1)
#define | ADC_EXTTRIG1_SPI_INT (ADC_CR1_TRIGS0_3 | ADC_CR1_TRIGS0_2 | ADC_CR1_TRIGS0_1 | ADC_CR1_TRIGS0_0)
#define | ADC_EXTTRIG1_PA1_INT (ADC_CR1_TRIGS0_4)
#define | ADC_EXTTRIG1_PA2_INT (ADC_CR1_TRIGS0_4 | ADC_CR1_TRIGS0_0)
#define | ADC_EXTTRIG1_PA3_INT (ADC_CR1_TRIGS0_4 | ADC_CR1_TRIGS0_1)
#define | ADC_EXTTRIG1_PB4_INT (ADC_CR1_TRIGS0_4 | ADC_CR1_TRIGS0_1 | ADC_CR1_TRIGS0_0)
#define | ADC_EXTTRIG1_PB5_INT (ADC_CR1_TRIGS0_4 | ADC_CR1_TRIGS0_2)
#define | ADC_EXTTRIG1_PC3_INT (ADC_CR1_TRIGS0_4 | ADC_CR1_TRIGS0_2 | ADC_CR1_TRIGS0_0)
#define | ADC_EXTTRIG1_PC4_INT (ADC_CR1_TRIGS0_4 | ADC_CR1_TRIGS0_2 | ADC_CR1_TRIGS0_0)
#define | ADC_EXTTRIG1_PC5_INT (ADC_CR1_TRIGS0_4 | ADC_CR1_TRIGS0_2 | ADC_CR1_TRIGS0_1)
#define | ADC_EXTTRIG1_PC6_INT (ADC_CR1_TRIGS0_4 | ADC_CR1_TRIGS0_3)
#define | ADC_EXTTRIG1_PC7_INT (ADC_CR1_TRIGS0_4 | ADC_CR1_TRIGS0_3 | ADC_CR1_TRIGS0_0)
#define | ADC_EXTTRIG1_PD1_INT (ADC_CR1_TRIGS0_4 | ADC_CR1_TRIGS0_3 | ADC_CR1_TRIGS0_1)
#define | ADC_EXTTRIG1_PD2_INT (ADC_CR1_TRIGS0_4 | ADC_CR1_TRIGS0_3 | ADC_CR1_TRIGS0_1 | ADC_CR1_TRIGS0_0)
#define | ADC_EXTTRIG1_PD3_INT (ADC_CR1_TRIGS0_4 | ADC_CR1_TRIGS0_3 | ADC_CR1_TRIGS0_2)
#define | ADC_EXTTRIG1_PD4_INT (ADC_CR1_TRIGS0_4 | ADC_CR1_TRIGS0_3 | ADC_CR1_TRIGS0_2 | ADC_CR1_TRIGS0_0)
#define | ADC_EXTTRIG1_PD5_INT (ADC_CR1_TRIGS0_4 | ADC_CR1_TRIGS0_3 | ADC_CR1_TRIGS0_2 | ADC_CR1_TRIGS0_1)
#define | ADC_EXTTRIG1_PD6_INT (ADC_CR1_TRIGS0_4 | ADC_CR1_TRIGS0_3 | ADC_CR1_TRIGS0_2 | ADC_CR1_TRIGS0_1 | ADC_CR1_TRIGS0_0)
#define | ADC_EXTTRIG1_PA4_INT (ADC_CR1_TRIGS0_5 | ADC_CR1_TRIGS0_0)
#define | ADC_EXTTRIG1_PB0_INT (ADC_CR1_TRIGS0_5 | ADC_CR1_TRIGS0_1)
#define | ADC_EXTTRIG1_PB1_INT (ADC_CR1_TRIGS0_5 | ADC_CR1_TRIGS0_1 | ADC_CR1_TRIGS0_0)
#define | ADC_EXTTRIG1_PB2_INT (ADC_CR1_TRIGS0_5 | ADC_CR1_TRIGS0_2)
#define | ADC_EXTTRIG1_PB3_INT (ADC_CR1_TRIGS0_5 | ADC_CR1_TRIGS0_2 | ADC_CR1_TRIGS0_0)
#define | ADC_EXTTRIG1_PB6_INT (ADC_CR1_TRIGS0_5 | ADC_CR1_TRIGS0_2 | ADC_CR1_TRIGS0_1)
#define | ADC_EXTTRIG1_PB7_INT (ADC_CR1_TRIGS0_5 | ADC_CR1_TRIGS0_2 | ADC_CR1_TRIGS0_1 | ADC_CR1_TRIGS0_0)
#define | ADC_EXTTRIG1_PC0_INT (ADC_CR1_TRIGS0_5 | ADC_CR1_TRIGS0_3)
#define | ADC_EXTTRIG1_PC1_INT (ADC_CR1_TRIGS0_5 | ADC_CR1_TRIGS0_3 | ADC_CR1_TRIGS0_0)
#define | ADC_EXTTRIG1_PC2_INT (ADC_CR1_TRIGS0_5 | ADC_CR1_TRIGS0_3 | ADC_CR1_TRIGS0_1)
#define | ADC_EXTTRIG1_PD0_INT (ADC_CR1_TRIGS0_5 | ADC_CR1_TRIGS0_3 | ADC_CR1_TRIGS0_1 | ADC_CR1_TRIGS0_0)
#define | ADC_EXTTRIG1_PD7_INT (ADC_CR1_TRIGS0_5 | ADC_CR1_TRIGS0_3 | ADC_CR1_TRIGS0_2)
#define | ADC_EXTTRIG1_MASK (0x1F | 0x10000)
#define | IS_ADC_EXTRIG1(EXTRIG) ((((EXTRIG) & ADC_EXTTRIG1_MASK) != 0x0000) || ((EXTRIG) == ADC_SOFTWARE_START))
#define | ADC_EXTTRIG2_TIM10 (ADC_CR1_TRIGS1_0)
#define | ADC_EXTTRIG2_TIM11 (ADC_CR1_TRIGS1_1)
#define | ADC_EXTTRIG2_TIM1 (ADC_CR1_TRIGS1_1 | ADC_CR1_TRIGS1_0)
#define | ADC_EXTTRIG2_LPTIM (ADC_CR1_TRIGS1_2 |)
#define | ADC_EXTTRIG2_TIM1_TRGO (ADC_CR1_TRIGS1_2 | ADC_CR1_TRIGS1_0)
#define | ADC_EXTTRIG2_TIM2_TRGO (ADC_CR1_TRIGS1_2 | ADC_CR1_TRIGS1_1)
#define | ADC_EXTTRIG2_TIM2_INT (ADC_CR1_TRIGS1_2 | ADC_CR1_TRIGS1_1 | ADC_CR1_TRIGS1_0)
#define | ADC_EXTTRIG2_UART0_INT (ADC_CR1_TRIGS1_3)
#define | ADC_EXTTRIG2_UART1_INT (ADC_CR1_TRIGS1_3 | ADC_CR1_TRIGS1_0)
#define | ADC_EXTTRIG2_LPUART_INT (ADC_CR1_TRIGS1_3 | ADC_CR1_TRIGS1_1)
#define | ADC_EXTTRIG2_VC0_INT (ADC_CR1_TRIGS1_3 | ADC_CR1_TRIGS1_1 | ADC_CR1_TRIGS1_0)
#define | ADC_EXTTRIG2_NC (ADC_CR1_TRIGS1_3 | ADC_CR1_TRIGS1_2)
#define | ADC_EXTTRIG2_RTC_INT (ADC_CR1_TRIGS1_3 | ADC_CR1_TRIGS1_2 | ADC_CR1_TRIGS1_0)
#define | ADC_EXTTRIG2_PCA_INT (ADC_CR1_TRIGS1_3 | ADC_CR1_TRIGS1_2 | ADC_CR1_TRIGS1_1)
#define | ADC_EXTTRIG2_SPI_INT (ADC_CR1_TRIGS1_3 | ADC_CR1_TRIGS1_2 | ADC_CR1_TRIGS1_1 | ADC_CR1_TRIGS1_0)
#define | ADC_EXTTRIG2_PA1_INT (ADC_CR1_TRIGS1_4)
#define | ADC_EXTTRIG2_PA2_INT (ADC_CR1_TRIGS1_4 | ADC_CR1_TRIGS1_0)
#define | ADC_EXTTRIG2_PA3_INT (ADC_CR1_TRIGS1_4 | ADC_CR1_TRIGS1_1)
#define | ADC_EXTTRIG2_PB4_INT (ADC_CR1_TRIGS1_4 | ADC_CR1_TRIGS1_1 | ADC_CR1_TRIGS1_0)
#define | ADC_EXTTRIG2_PB5_INT (ADC_CR1_TRIGS1_4 | ADC_CR1_TRIGS1_2)
#define | ADC_EXTTRIG2_PC3_INT (ADC_CR1_TRIGS1_4 | ADC_CR1_TRIGS1_2 | ADC_CR1_TRIGS1_0)
#define | ADC_EXTTRIG2_PC4_INT (ADC_CR1_TRIGS1_4 | ADC_CR1_TRIGS1_2 | ADC_CR1_TRIGS1_0)
#define | ADC_EXTTRIG2_PC5_INT (ADC_CR1_TRIGS1_4 | ADC_CR1_TRIGS1_2 | ADC_CR1_TRIGS1_1)
#define | ADC_EXTTRIG2_PC6_INT (ADC_CR1_TRIGS1_4 | ADC_CR1_TRIGS1_3)
#define | ADC_EXTTRIG2_PC7_INT (ADC_CR1_TRIGS1_4 | ADC_CR1_TRIGS1_3 | ADC_CR1_TRIGS1_0)
#define | ADC_EXTTRIG2_PD1_INT (ADC_CR1_TRIGS1_4 | ADC_CR1_TRIGS1_3 | ADC_CR1_TRIGS1_1)
#define | ADC_EXTTRIG2_PD2_INT (ADC_CR1_TRIGS1_4 | ADC_CR1_TRIGS1_3 | ADC_CR1_TRIGS1_1 | ADC_CR1_TRIGS1_0)
#define | ADC_EXTTRIG2_PD3_INT (ADC_CR1_TRIGS1_4 | ADC_CR1_TRIGS1_3 | ADC_CR1_TRIGS1_2)
#define | ADC_EXTTRIG2_PD4_INT (ADC_CR1_TRIGS1_4 | ADC_CR1_TRIGS1_3 | ADC_CR1_TRIGS1_2 | ADC_CR1_TRIGS1_0)
#define | ADC_EXTTRIG2_PD5_INT (ADC_CR1_TRIGS1_4 | ADC_CR1_TRIGS1_3 | ADC_CR1_TRIGS1_2 | ADC_CR1_TRIGS1_1)
#define | ADC_EXTTRIG2_PD6_INT (ADC_CR1_TRIGS1_4 | ADC_CR1_TRIGS1_3 | ADC_CR1_TRIGS1_2 | ADC_CR1_TRIGS1_1 | ADC_CR1_TRIGS1_0)
#define | ADC_EXTTRIG2_PA4_INT (ADC_CR1_TRIGS1_5 | ADC_CR1_TRIGS1_0)
#define | ADC_EXTTRIG2_PB0_INT (ADC_CR1_TRIGS1_5 | ADC_CR1_TRIGS1_1)
#define | ADC_EXTTRIG2_PB1_INT (ADC_CR1_TRIGS1_5 | ADC_CR1_TRIGS1_1 | ADC_CR1_TRIGS1_0)
#define | ADC_EXTTRIG2_PB2_INT (ADC_CR1_TRIGS1_5 | ADC_CR1_TRIGS1_2)
#define | ADC_EXTTRIG2_PB3_INT (ADC_CR1_TRIGS1_5 | ADC_CR1_TRIGS1_2 | ADC_CR1_TRIGS1_0)
#define | ADC_EXTTRIG2_PB6_INT (ADC_CR1_TRIGS1_5 | ADC_CR1_TRIGS1_2 | ADC_CR1_TRIGS1_1)
#define | ADC_EXTTRIG2_PB7_INT (ADC_CR1_TRIGS1_5 | ADC_CR1_TRIGS1_2 | ADC_CR1_TRIGS1_1 | ADC_CR1_TRIGS1_0)
#define | ADC_EXTTRIG2_PC0_INT (ADC_CR1_TRIGS1_5 | ADC_CR1_TRIGS1_3)
#define | ADC_EXTTRIG2_PC1_INT (ADC_CR1_TRIGS1_5 | ADC_CR1_TRIGS1_3 | ADC_CR1_TRIGS1_0)
#define | ADC_EXTTRIG2_PC2_INT (ADC_CR1_TRIGS1_5 | ADC_CR1_TRIGS1_3 | ADC_CR1_TRIGS1_1)
#define | ADC_EXTTRIG2_PD0_INT (ADC_CR1_TRIGS1_5 | ADC_CR1_TRIGS1_3 | ADC_CR1_TRIGS1_1 | ADC_CR1_TRIGS1_0)
#define | ADC_EXTTRIG2_PD7_INT (ADC_CR1_TRIGS1_5 | ADC_CR1_TRIGS1_3 | ADC_CR1_TRIGS1_2)
#define | ADC_EXTTRIG2_MASK (0x3E0 | 0x20000)
#define | IS_ADC_EXTRIG2(EXTRIG) ((((EXTRIG) & ADC_EXTTRIG2_MASK) != 0x0000) || ((EXTRIG) == ADC_SOFTWARE_START))

## 函数
void | ADC_DeInit (void)
| Deinitializes the ADC peripheral registers to their default reset values. 更多...
void | ADC_Init (ADC_InitTypeDef *ADC_InitStruct)
| Initializes the ADC peripheral according to the specified parameters in the ADC_InitStruct. 更多...
void | ADC_StructInit (ADC_InitTypeDef *ADC_InitStruct)
| Fills each ADC_InitStruct member with its default value. 更多...
void | ADC_Cmd (FunctionalState NewState)
| Enables or disables the ADC peripheral. 更多...
void | ADC_ITConfig (uint32_t ADC_IT, FunctionalState NewState)
| Enables or disables the specified ADC interrupts. 更多...
void | ADC_SoftwareStartConvCmd (FunctionalState NewState)
| Enables or disables the selected ADC software start conversion. 更多...
FlagStatus | ADC_GetSoftwareStartConvStatus (void)
| Gets the selected ADC Software start conversion Status. 更多...
uint16_t | ADC_GetConversionValue (uint32_t Chnannel)
| Returns the last ADC conversion result data for regular channel. 更多...
uint32_t | ADC_GetAccValue (void)
| Gets ADC accumulation conversion result. 更多...
FlagStatus | ADC_GetFlagStatus (uint16_t ADC_FLAG)
| Checks whether the specified ADC flag is set or not. 更多...
FlagStatus | ADC_GetRawFlagStatus (uint16_t ADC_FLAG)
| Checks whether the specified ADC flag is set or not. 更多...
ITStatus | ADC_GetITStatus (uint16_t ADC_IT)
| Checks whether the specified ADC interrupt is set or not. 更多...
void | ADC_ClearFlag (uint16_t ADC_FLAG)
| Clears the ADC pending interrupt flags. 更多...
void | ADC_ClearITPendingBit (uint16_t ADC_IT)
| Clears the ADC pending interrupt bits. 更多...
void | ADC_ThresholdsConfig (uint16_t LowThreshold, uint16_t HighThreshold)
| Configures the high and low thresholds of the analog watchdog. 更多...
void | ADC_ThresholdsCompareCmd (uint16_t Threshold_Config, FunctionalState NewState)
| Enables or disables the thresholds to compare with the function of analog watchdog. 更多...

## 详细描述

This file contains all the functions prototypes for the ADC firmware library.

作者
  megawin Application Team

版本
  V0.0.5

日期
  13-August-2024