MG32L003 Standard Peripherals Firmware Library
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Structure type to access the Nested Vectored Interrupt Controller (NVIC). More...
#include <core_cm0plus.h>
Data Fields | |
__IOM uint32_t | ISER [1U] |
uint32_t | RESERVED0 [31U] |
__IOM uint32_t | ICER [1U] |
uint32_t | RSERVED1 [31U] |
__IOM uint32_t | ISPR [1U] |
uint32_t | RESERVED2 [31U] |
__IOM uint32_t | ICPR [1U] |
uint32_t | RESERVED3 [31U] |
uint32_t | RESERVED4 [64U] |
__IOM uint32_t | IP [8U] |
Structure type to access the Nested Vectored Interrupt Controller (NVIC).
__IOM uint32_t ICER[1U] |
Offset: 0x080 (R/W) Interrupt Clear Enable Register
__IOM uint32_t ICPR[1U] |
Offset: 0x180 (R/W) Interrupt Clear Pending Register
__IOM uint32_t IP[8U] |
Offset: 0x300 (R/W) Interrupt Priority Register
__IOM uint32_t ISER[1U] |
Offset: 0x000 (R/W) Interrupt Set Enable Register
__IOM uint32_t ISPR[1U] |
Offset: 0x100 (R/W) Interrupt Set Pending Register