11 #ifndef __MG32L003_I2C_H 12 #define __MG32L003_I2C_H 71 #define I2C_MASTER_MODE_DISABLE ((uint32_t)0x00000000U) 72 #define I2C_MASTER_MODE_ENABLE ((uint32_t)0x00000001U) 74 #define IS_I2C_MASTER_MODE(MASTER_MODE) (((MASTER_MODE) == I2C_MASTER_MODE_DISABLE) ||\ 75 ((MASTER_MODE) == I2C_MASTER_MODE_ENABLE)) 83 #define I2C_SLAVE_MODE_ENABLE ((uint32_t)0x00000000U) 84 #define I2C_SLAVE_MODE_DISABLE ((uint32_t)0x00000001U) 86 #define IS_I2C_SLAVE_MODE(SLAVE_MODE) (((SLAVE_MODE) == I2C_SLAVE_MODE_ENABLE) || \ 87 ((SLAVE_MODE) == I2C_SLAVE_MODE_DISABLE)) 95 #define I2C_BROAD_ACK_ENABLE ((uint32_t)0x00000000U) 96 #define I2C_BROAD_ACK_DISABLE ((uint32_t)0x00000001U) 98 #define IS_I2C_BROAD_ACK(BROAD_ACK) (((BROAD_ACK) == I2C_BROAD_ACK_ENABLE) ||\ 99 ((BROAD_ACK) == I2C_BROAD_ACK_DISABLE)) 107 #define I2C_HIGH_RATE_ENABLE ((uint32_t)0x00000000U) 108 #define I2C_HIGH_RATE_DISABLE I2C_CR_H1M 116 #define I2C_Direction_Transmitter ((uint8_t)0x00) 117 #define I2C_Direction_Receiver ((uint8_t)0x01) 119 #define IS_I2C_DIRECTION(I2C_Direction) (((I2C_Direction) == I2C_Direction_Transmitter) || \ 120 ((I2C_Direction) == I2C_Direction_Receiver)) 128 #define I2C_STA_0 ((uint8_t)(0x00)) 129 #define I2C_STA_1 ((uint8_t)(0x01 << 5)) 130 #define I2C_STO_0 ((uint8_t)(0x00)) 131 #define I2C_STO_1 ((uint8_t)(0x01 << 4)) 132 #define I2C_AA_0 ((uint8_t)(0x00)) 133 #define I2C_AA_1 ((uint8_t)(0x01 << 2)) 134 #define I2C_CR_Status_Mask ((uint8_t)(0xC3)) 136 #define IS_I2C_STA(I2C_STA) (((I2C_STA) == I2C_STA_0) || ((I2C_STA) == I2C_STA_1)) 137 #define IS_I2C_STO(I2C_STO) (((I2C_STO) == I2C_STO_0) || ((I2C_STO) == I2C_STO_1)) 138 #define IS_I2C_AA(I2C_AA) (((I2C_AA) == I2C_AA_0) || ((I2C_AA) == I2C_AA_1)) 146 #define I2C_FLAG_ERROR_UNDER ((uint32_t)0x00000000U) 147 #define I2C_FLAG_USELESS ((uint32_t)0x000000F8U) 149 #define I2C_FLAG_MASTER_TX_START ((uint32_t)0x00000008U) 150 #define I2C_FLAG_MASTER_TX_RESTART ((uint32_t)0x00000010U) 151 #define I2C_FLAG_MASTER_TX_SLAW_ACK ((uint32_t)0x00000018U) 152 #define I2C_FLAG_MASTER_TX_SLAW_NOACK ((uint32_t)0x00000020U) 153 #define I2C_FLAG_MASTER_TX_DATA_ACK ((uint32_t)0x00000028U) 154 #define I2C_FLAG_MASTER_TX_DATA_NOACK ((uint32_t)0x00000030U) 155 #define I2C_FLAG_MASTER_TX_LOST_SCL ((uint32_t)0x00000038U) 157 #define I2C_FLAG_MASTER_RX_START ((uint32_t)0x00000008U) 158 #define I2C_FLAG_MASTER_RX_RESTART ((uint32_t)0x00000010U) 159 #define I2C_FLAG_MASTER_RX_SLAW_ACK ((uint32_t)0x00000040U) 160 #define I2C_FLAG_MASTER_RX_SLAW_NOACK ((uint32_t)0x00000048U) 161 #define I2C_FLAG_MASTER_RX_DATA_ACK ((uint32_t)0x00000050U) 162 #define I2C_FLAG_MASTER_RX_DATA_NOACK ((uint32_t)0x00000058U) 163 #define I2C_FLAG_MASTER_RX_LOST_SCL ((uint32_t)0x00000038U) 165 #define I2C_FLAG_SLAVE_TX_SLAW_ACK ((uint32_t)0x000000A8U) 166 #define I2C_FLAG_SLAVE_TX_DATA_ACK ((uint32_t)0x000000B8U) 167 #define I2C_FLAG_SLAVE_TX_DATA_NOACK ((uint32_t)0x000000C0U) 168 #define I2C_FLAG_SLAVE_TX_DATA_LAST ((uint32_t)0x000000C8U) 169 #define I2C_FLAG_SLAVE_TX_LOST_SCL ((uint32_t)0x000000B0U) 171 #define I2C_FLAG_SLAVE_RX_SLAW_ACK ((uint32_t)0x00000060U) 172 #define I2C_FLAG_SLAVE_RX_BROAD_ACK ((uint32_t)0x00000070U) 173 #define I2C_FLAG_SLAVE_RX_SDATA_ACK ((uint32_t)0x00000080U) 174 #define I2C_FLAG_SLAVE_RX_SDATA_NOACK ((uint32_t)0x00000088U) 175 #define I2C_FLAG_SLAVE_RX_BDATA_ACK ((uint32_t)0x00000090U) 176 #define I2C_FLAG_SLAVE_RX_BDATA_NOACK ((uint32_t)0x00000098U) 177 #define I2C_FLAG_SLAVE_RX_SA_LOST_SCL ((uint32_t)0x00000068U) 178 #define I2C_FLAG_SLAVE_RX_BA_LOST_SCL ((uint32_t)0x00000078U) 179 #define I2C_FLAG_SLAVE_STOP_RESTART ((uint32_t)0x000000A0U) 196 void I2C_Start(FunctionalState NewState);
197 void I2C_Stop(FunctionalState NewState);
198 void I2C_ACK(FunctionalState NewState);
199 void I2C_Cmd(FunctionalState NewState);
Definition: mg32l003_i2c.h:57
void I2C_ReceiveByte(uint8_t *pData)
Reads data from data register.
Definition: mg32l003_i2c.c:271
void I2C_SwitchStatus(uint8_t I2C_STA, uint8_t I2C_STO, uint8_t I2C_AA)
Writes I2C CR register for switching I2C bus status.
Definition: mg32l003_i2c.c:141
Definition: mg32l003_i2c.h:59
uint32_t slave
Definition: mg32l003_i2c.h:39
void I2C_WriteAddress(uint8_t Address, uint8_t I2C_Direction)
Write the slave address byte by the direction.
Definition: mg32l003_i2c.c:296
uint32_t speedclock
Definition: mg32l003_i2c.h:44
void I2C_HighSpeedModeCmd(FunctionalState NewState)
Configures I2C high speed mode.
Definition: mg32l003_i2c.c:114
ITStatus I2C_GetITStatus(void)
Checks whether I2C interrupt has occurred or not.
Definition: mg32l003_i2c.c:343
void I2C_DeInit(void)
Deinitializes the I2C peripheral registers to their default reset values.
Definition: mg32l003_i2c.c:38
void I2C_WriteByte(uint8_t I2C_DataCmd)
Write one byte data.
Definition: mg32l003_i2c.c:281
void I2C_Start(FunctionalState NewState)
Sets or clears I2C peripheral start status.
Definition: mg32l003_i2c.c:166
void I2C_ClearITPendingBit(void)
Clears I2C interrupt pending bit.
Definition: mg32l003_i2c.c:368
void I2C_ACK(FunctionalState NewState)
Sets or clears I2C peripheral ACK status.
Definition: mg32l003_i2c.c:209
void I2C_Init(I2C_InitTypeDef *I2C_InitStruct)
Initializes the I2C peripheral according to the specified parameters in the I2C_InitStruct.
Definition: mg32l003_i2c.c:50
I2CStatus
I2CStatus enum definition.
Definition: mg32l003_i2c.h:54
void I2C_SlaveAddressConfig(uint32_t SlaveAddress)
Configures the I2C slave address.
Definition: mg32l003_i2c.c:103
Definition: mg32l003_i2c.h:58
uint32_t slaveAddr
Definition: mg32l003_i2c.h:42
Definition: mg32l003_i2c.h:56
I2C Initial Configuration Structure definition.
Definition: mg32l003_i2c.h:34
void I2C_AckGeneralCallCmd(FunctionalState NewState)
Enables or disables the general ack.
Definition: mg32l003_i2c.c:251
void I2C_Cmd(FunctionalState NewState)
Enables or disables I2C peripheral.
Definition: mg32l003_i2c.c:230
I2CStatus I2C_CheckFlag(uint32_t *I2C_Flag)
Gets the last I2C module status flag.
Definition: mg32l003_i2c.c:322
uint32_t broadack
Definition: mg32l003_i2c.h:46
uint32_t master
Definition: mg32l003_i2c.h:36
void I2C_Stop(FunctionalState NewState)
Sets or clears I2C peripheral stop status.
Definition: mg32l003_i2c.c:187