/**
 ******************************************************************************
 *
 * @file        MG32__ExtraStruct.h
 *
 * @brief       MG32 Extra Structure Definition File
 *
 * @par         Project
 *              MG32
 * @version     V0.95 (Register File Date : 2025_1031)
 * @date        2026/07/03 15:02 (H File Generated Date)
 * @author      ExtraStructGen V1.20
 * @copyright   Copyright (c) 2024 Megawin Technology Co., Ltd.
 *              All rights reserved.
 *
 * Important!   This file is generated by code generator. Do not edit!
 *
 ******************************************************************************
 */

#ifndef _MG32__ExtraStruct_H
#define _MG32__ExtraStruct_H
#define _MG32__ExtraStruct_H_VER                    95      /*!< File Version */

#include "MG32.h"

/**
 ******************************************************************************
 *
 * @struct      DAC_EX_Struct
 *              DAC_EX  [Module Structure Typedef]
 *
 ******************************************************************************
 */
typedef struct
{
    union
    {
        __IO  uint32_t  W;
        __IO  uint16_t  H[2];
        __IO  uint8_t   B[4];
        struct
        {
            __IO uint8_t  DAx_EN        :1;     //[0] DAC-x power-on enable bit.
                                        //0 = Disable
                                        //1 = Enable
            __IO uint8_t  BUFx_EN       :1;     //[1] DAC-x output buffer enable bit.
                                        //0 = Disable
                                        //1 = Enable
            __I  uint8_t                :2;     //[3..2] 
            __IO uint8_t  ALIGNx_SEL    :1;     //[4] DAC-x data alignment select.
                                        //0 = Right (Right alignment)
                                        //1 = Left (Left alignment)
            __I  uint8_t                :1;     //[5] 
            __IO uint8_t  RESx_SEL      :2;     //[7..6] DAC-x data resolution select
                                        //0x0 = 12-bit
                                        //0x1 = 10-bit
                                        //0x2 = 8-bit
            __IO uint8_t  STARTx_SEL    :3;     //[10..8] DAC-x start trigger control source select
                                        //0x0 = WDAT : DAC_DAT0 register written
                                        //0x1 = PIN : DAC_TRG external trigger pin
                                        //0x2 = Reserved
                                        //0x3 = TM00 : TM00_TRGO
                                        //0x4 = TM01 : TM01_TRGO
                                        //0x5 = Reserved
                                        //0x6 = ITR6 : APB_ITR6
                                        //0x7 = ITR7 : APB_ITR7
            __I  uint8_t                :1;     //[11] 
            __IO uint8_t  TRGx_SEL      :2;     //[13..12] DAC-x start trigger selection
                                        //0x0 = Disable
                                        //0x1 = Rising edge
                                        //0x2 = Falling edge
                                        //0x3 = Dual-edge
            __I  uint8_t                :2;     //[15..14] 
            __I  uint8_t                :1;     //[16] 
            __I  uint8_t                :7;     //[23..17] 
            __I  uint8_t                :7;     //[30..24] 
            __IO uint8_t  DMAx_EN       :1;     //[31] Direct memory access enable to transmit
                                        //0 = Disable
                                        //1 = Enable
        }MBIT;
    }CR;                                /*!< CR         ~ Offset[0x10]  DAC control register 0 */

    __I uint32_t  RESERVED0[3];         /*!< RESERVED0  ~ Offset[0x14]  Reserved */

    union
    {
        __IO  uint32_t  W;
        __IO  uint16_t  H[2];
        __IO  uint8_t   B[4];
        struct
        {
            __IO uint16_t DATx          :12;    //[11..0] DAC-x conversion data register
            __I  uint8_t                :4;     //[15..12] 
            __I  uint16_t               :16;    //[31..16] 
        }MBIT;
    }DAT;                               /*!< DAT        ~ Offset[0x20]  DAC conversion data register 0 */

} DAC_EX_Struct;

/**
 ******************************************************************************
 *
 * @name        DAC_EX  [Base Address/Type]
 *
 ******************************************************************************
 */
///@{
#define DAC_EX0_Base                    ((uint32_t)0x5C080010)              /*!< Digital-to-Analog Converter Control */
#define DAC_EX1_Base                    ((uint32_t)0x5C080014)              /*!< Digital-to-Analog Converter Control */
#define DAC_EX0                         ((DAC_EX_Struct*) DAC_EX0_Base)
#define DAC_EX1                         ((DAC_EX_Struct*) DAC_EX1_Base)
///@}

/**
 ******************************************************************************
 *
 * @struct      EXIC_PX_Struct
 *              EXIC_PX  [Module Structure Typedef]
 *
 ******************************************************************************
 */
typedef struct
{
    union
    {
        __IO  uint32_t  W;
        __IO  uint16_t  H[2];
        __IO  uint8_t   B[4];
        struct
        {
            __IO uint8_t  PIN0_PF        :1;     /*!< [0] EXIC pin input interrupt pending flag x for external input interrupt pin of PX*/ 
                                                 /*!< 0 = Normal : No event occurred */ 
                                                 /*!< 1 = Happened : Event happened */ 
            __IO uint8_t  PIN1_PF        :1;     /*!< [1] Refer to EXIC_PX0_PF.*/ 
                                                 /*!< 0 = Normal : No event occurred */ 
                                                 /*!< 1 = Happened : Event happened */ 
            __IO uint8_t  PIN2_PF        :1;     /*!< [2] Refer to EXIC_PX0_PF.*/ 
                                                 /*!< 0 = Normal : No event occurred */ 
                                                 /*!< 1 = Happened : Event happened */ 
            __IO uint8_t  PIN3_PF        :1;     /*!< [3] Refer to EXIC_PX0_PF.*/ 
                                                 /*!< 0 = Normal : No event occurred */ 
                                                 /*!< 1 = Happened : Event happened */ 
            __IO uint8_t  PIN4_PF        :1;     /*!< [4] Refer to EXIC_PX0_PF.*/ 
                                                 /*!< 0 = Normal : No event occurred */ 
                                                 /*!< 1 = Happened : Event happened */ 
            __IO uint8_t  PIN5_PF        :1;     /*!< [5] Refer to EXIC_PX0_PF.*/ 
                                                 /*!< 0 = Normal : No event occurred */ 
                                                 /*!< 1 = Happened : Event happened */ 
            __IO uint8_t  PIN6_PF        :1;     /*!< [6] Refer to EXIC_PX0_PF.*/ 
                                                 /*!< 0 = Normal : No event occurred */ 
                                                 /*!< 1 = Happened : Event happened */ 
            __IO uint8_t  PIN7_PF        :1;     /*!< [7] Refer to EXIC_PX0_PF.*/ 
                                                 /*!< 0 = Normal : No event occurred */ 
                                                 /*!< 1 = Happened : Event happened */ 
            __IO uint8_t  PIN8_PF        :1;     /*!< [8] Refer to EXIC_PX0_PF.*/ 
                                                 /*!< 0 = Normal : No event occurred */ 
                                                 /*!< 1 = Happened : Event happened */ 
            __IO uint8_t  PIN9_PF        :1;     /*!< [9] Refer to EXIC_PX0_PF.*/ 
                                                 /*!< 0 = Normal : No event occurred */ 
                                                 /*!< 1 = Happened : Event happened */ 
            __IO uint8_t  PIN10_PF       :1;     /*!< [10] Refer to EXIC_PX0_PF.*/ 
                                                 /*!< 0 = Normal : No event occurred */ 
                                                 /*!< 1 = Happened : Event happened */ 
            __IO uint8_t  PIN11_PF       :1;     /*!< [11] Refer to EXIC_PX0_PF. */ 
                                                 /*!< 0 = Normal : No event occurred */ 
                                                 /*!< 1 = Happened : Event happened */ 
            __IO uint8_t  PIN12_PF       :1;     /*!< [12] Refer to EXIC_PX0_PF.*/ 
                                                 /*!< 0 = Normal : No event occurred */ 
                                                 /*!< 1 = Happened : Event happened */ 
            __IO uint8_t  PIN13_PF       :1;     /*!< [13] Refer to EXIC_PX0_PF.*/ 
                                                 /*!< 0 = Normal : No event occurred */ 
                                                 /*!< 1 = Happened : Event happened */ 
            __IO uint8_t  PIN14_PF       :1;     /*!< [14] Refer to EXIC_PX0_PF. */ 
                                                 /*!< 0 = Normal : No event occurred */ 
                                                 /*!< 1 = Happened : Event happened */ 
            __IO uint8_t  PIN15_PF       :1;     /*!< [15] Refer to EXIC_PX0_PF. */ 
                                                 /*!< 0 = Normal : No event occurred */ 
                                                 /*!< 1 = Happened : Event happened */ 
            __I  uint16_t               :16;     /*!< [31..16] */ 
        }MBIT;
    }PF;                                        /*!< PX_PF      ~ Offset[0x20]  EXIC PX input interrupt pending flag register */                           

    union
    {
        __IO  uint32_t  W;
        __IO  uint16_t  H[2];
        __IO  uint8_t   B[4];
        struct
        {
            __IO uint8_t  PIN0_TRGS      :2;     /*!<[1..0] External interrupt pin edge/level trigger event select */ 
                                                 /*!<0x0 = No : No updated flag */ 
                                                 /*!<0x1 = Level */ 
                                                 /*!<0x2 = Edge */ 
                                                 /*!<0x3 = Dual-edge */ 
            __IO uint8_t  PIN1_TRGS      :2;     /*!<[3..2] Refer to EXIC_PX0_TRGS. */ 
                                                 /*!<0x0 = No : No updated flag */ 
                                                 /*!<0x1 = Level */ 
                                                 /*!<0x2 = Edge */ 
                                                 /*!<0x3 = Dual-edge */ 
            __IO uint8_t  PIN2_TRGS      :2;     /*!<[5..4] Refer to EXIC_PX0_TRGS. */ 
                                                 /*!<0x0 = No : No updated flag */ 
                                                 /*!<0x1 = Level */ 
                                                 /*!<0x2 = Edge */ 
                                                 /*!<0x3 = Dual-edge */ 
            __IO uint8_t  PIN3_TRGS      :2;     /*!<[7..6] Refer to EXIC_PX0_TRGS. */ 
                                                 /*!<0x0 = No : No updated flag */ 
                                                 /*!<0x1 = Level */ 
                                                 /*!<0x2 = Edge */ 
                                                 /*!<0x3 = Dual-edge */ 
            __IO uint8_t  PIN4_TRGS      :2;     /*!<[9..8] Refer to EXIC_PX0_TRGS. */ 
                                                 /*!<0x0 = No : No updated flag */ 
                                                 /*!<0x1 = Level */ 
                                                 /*!<0x2 = Edge */ 
                                                 /*!<0x3 = Dual-edge */ 
            __IO uint8_t  PIN5_TRGS      :2;     /*!<[11..10] Refer to EXIC_PX0_TRGS. */ 
                                                 /*!<0x0 = No : No updated flag */ 
                                                 /*!<0x1 = Level */ 
                                                 /*!<0x2 = Edge */ 
                                                 /*!<0x3 = Dual-edge */ 
            __IO uint8_t  PIN6_TRGS      :2;     /*!<[13..12] Refer to EXIC_PX0_TRGS. */ 
                                                 /*!<0x0 = No : No updated flag */ 
                                                 /*!<0x1 = Level */ 
                                                 /*!<0x2 = Edge */ 
                                                 /*!<0x3 = Dual-edge */ 
            __IO uint8_t  PIN7_TRGS      :2;     /*!<[15..14] Refer to EXIC_PX0_TRGS. */ 
                                                 /*!<0x0 = No : No updated flag */ 
                                                 /*!<0x1 = Level */ 
                                                 /*!<0x2 = Edge */ 
                                                 /*!<0x3 = Dual-edge */ 
            __IO uint8_t  PIN8_TRGS      :2;     /*!<[17..16] Refer to EXIC_PX0_TRGS. */ 
                                                 /*!<0x0 = No : No updated flag */ 
                                                 /*!<0x1 = Level */ 
                                                 /*!<0x2 = Edge */ 
                                                 /*!<0x3 = Dual-edge */ 
            __IO uint8_t  PIN9_TRGS      :2;     /*!<[19..18] Refer to EXIC_PX0_TRGS. */ 
                                                 /*!<0x0 = No : No updated flag */ 
                                                 /*!<0x1 = Level */ 
                                                 /*!<0x2 = Edge */ 
                                                 /*!<0x3 = Dual-edge */ 
            __IO uint8_t  PIN10_TRGS     :2;     /*!<[21..20] Refer to EXIC_PX0_TRGS. */ 
                                                 /*!<0x0 = No : No updated flag */ 
                                                 /*!<0x1 = Level */ 
                                                 /*!<0x2 = Edge */ 
                                                 /*!<0x3 = Dual-edge */ 
            __IO uint8_t  PIN11_TRGS     :2;     /*!<[23..22] Refer to EXIC_PX0_TRGS. */ 
                                                 /*!<0x0 = No : No updated flag */ 
                                                 /*!<0x1 = Level */ 
                                                 /*!<0x2 = Edge */ 
                                                 /*!<0x3 = Dual-edge */ 
            __IO uint8_t  PIN12_TRGS     :2;     /*!<[25..24] Refer to EXIC_PX0_TRGS. */ 
                                                 /*!<0x0 = No : No updated flag */ 
                                                 /*!<0x1 = Level */ 
                                                 /*!<0x2 = Edge */ 
                                                 /*!<0x3 = Dual-edge */ 
            __IO uint8_t  PIN13_TRGS     :2;     /*!<[27..26] Refer to EXIC_PX0_TRGS. */ 
                                                 /*!<0x0 = No : No updated flag */ 
                                                 /*!<0x1 = Level */ 
                                                 /*!<0x2 = Edge */ 
                                                 /*!<0x3 = Dual-edge */ 
            __IO uint8_t  PIN14_TRGS     :2;     /*!<[29..28] Refer to EXIC_PX0_TRGS. */ 
                                                 /*!<0x0 = No : No updated flag */ 
                                                 /*!<0x1 = Level */ 
                                                 /*!<0x2 = Edge */ 
                                                 /*!<0x3 = Dual-edge */ 
            __IO uint8_t  PIN15_TRGS     :2;     /*!<[31..30] Refer to EXIC_PX0_TRGS. */ 
                                                 /*!<0x0 = No : No updated flag */ 
                                                 /*!<0x1 = Level */ 
                                                 /*!<0x2 = Edge */ 
                                                 /*!<0x3 = Dual-edge */ 
        }MBIT;
    }TRGS;                                       /*!< PX_TRGS    ~ Offset[0x24]  EXIC PX Pad input trigger select register */        

    union
    {
        __IO  uint32_t  W;
        __IO  uint16_t  H[2];
        __IO  uint8_t   B[4];
        struct
        {
            __IO uint8_t  PIN0_OM        :1;    /*!<[0] External interrupt pin of PX OR mask bit x */
                                                /*!<0 = Disable (Mask) */
                                                /*!<1 = Enable */
            __IO uint8_t  PIN1_OM        :1;    /*!<[1] Refer to EXIC_PX0_OM. */
                                                /*!<0 = Disable (Mask) */
                                                /*!<1 = Enable */
            __IO uint8_t  PIN2_OM        :1;    /*!<[2] Refer to EXIC_PX0_OM. */
                                                /*!<0 = Disable (Mask) */
                                                /*!<1 = Enable */
            __IO uint8_t  PIN3_OM        :1;    /*!<[3] Refer to EXIC_PX0_OM. */
                                                /*!<0 = Disable (Mask) */
                                                /*!<1 = Enable */
            __IO uint8_t  PIN4_OM        :1;    /*!<[4] Refer to EXIC_PX0_OM. */
                                                /*!<0 = Disable (Mask) */
                                                /*!<1 = Enable */
            __IO uint8_t  PIN5_OM        :1;    /*!<[5] Refer to EXIC_PX0_OM. */
                                                /*!<0 = Disable (Mask) */
                                                /*!<1 = Enable */
            __IO uint8_t  PIN6_OM        :1;    /*!<[6] Refer to EXIC_PX0_OM. */
                                                /*!<0 = Disable (Mask) */
                                                /*!<1 = Enable */
            __IO uint8_t  PIN7_OM        :1;    /*!<[7] Refer to EXIC_PX0_OM. */
                                                /*!<0 = Disable (Mask) */
                                                /*!<1 = Enable */
            __IO uint8_t  PIN8_OM        :1;    /*!<[8] Refer to EXIC_PX0_OM. */
                                                /*!<0 = Disable (Mask) */
                                                /*!<1 = Enable */
            __IO uint8_t  PIN9_OM        :1;    /*!<[9] Refer to EXIC_PX0_OM. */
                                                /*!<0 = Disable (Mask) */
                                                /*!<1 = Enable */
            __IO uint8_t  PIN10_OM       :1;    /*!<[10] Refer to EXIC_PX0_OM. */
                                                /*!<0 = Disable (Mask) */
                                                /*!<1 = Enable */
            __IO uint8_t  PIN11_OM       :1;    /*!<[11] Refer to EXIC_PX0_OM. */
                                                /*!<0 = Disable (Mask) */
                                                /*!<1 = Enable */
            __IO uint8_t  PIN12_OM       :1;    /*!<[12] Refer to EXIC_PX0_OM. */
                                                /*!<0 = Disable (Mask) */
                                                /*!<1 = Enable */
            __IO uint8_t  PIN13_OM       :1;    /*!<[13] Refer to EXIC_PX0_OM. */
                                                /*!<0 = Disable (Mask) */
                                                /*!<1 = Enable */
            __IO uint8_t  PIN14_OM       :1;    /*!<[14] Refer to EXIC_PX0_OM. */
                                                /*!<0 = Disable (Mask) */
                                                /*!<1 = Enable */
            __IO uint8_t  PIN15_OM       :1;    /*!<[15] Refer to EXIC_PX0_OM. */
                                                /*!<0 = Disable (Mask) */
                                                /*!<1 = Enable */
            __IO uint8_t  PIN0_AM        :1;    /*!<[16] External interrupt pin of PX AND mask bit x */
                                                /*!<0 = Disable (Mask) */
                                                /*!<1 = Enable  */
            __IO uint8_t  PIN1_AM        :1;    /*!<[17] Refer to EXIC_PX0_AM. */
                                                /*!<0 = Disable (Mask) */
                                                /*!<1 = Enable */
            __IO uint8_t  PIN2_AM        :1;    /*!<[18] Refer to EXIC_PX0_AM. */
                                                /*!<0 = Disable (Mask) */
                                                /*!<1 = Enable */
            __IO uint8_t  PIN3_AM        :1;    /*!<[19] Refer to EXIC_PX0_AM. */
                                                /*!<0 = Disable (Mask) */
                                                /*!<1 = Enable */
            __IO uint8_t  PIN4_AM        :1;    /*!<[20] Refer to EXIC_PX0_AM. */
                                                /*!<0 = Disable (Mask) */
                                                /*!<1 = Enable */
            __IO uint8_t  PIN5_AM        :1;    /*!<[21] Refer to EXIC_PX0_AM. */
                                                /*!<0 = Disable (Mask) */
                                                /*!<1 = Enable */
            __IO uint8_t  PIN6_AM        :1;    /*!<[22] Refer to EXIC_PX0_AM. */
                                                /*!<0 = Disable (Mask) */
                                                /*!<1 = Enable */
            __IO uint8_t  PIN7_AM        :1;    /*!<[23] Refer to EXIC_PX0_AM. */
                                                /*!<0 = Disable (Mask) */
                                                /*!<1 = Enable */
            __IO uint8_t  PIN8_AM        :1;    /*!<[24] Refer to EXIC_PX0_AM. */
                                                /*!<0 = Disable (Mask) */
                                                /*!<1 = Enable */
            __IO uint8_t  PIN9_AM        :1;    /*!<[25] Refer to EXIC_PX0_AM. */
                                                /*!<0 = Disable (Mask) */
                                                /*!<1 = Enable */
            __IO uint8_t  PIN10_AM       :1;    /*!<[26] Refer to EXIC_PX0_AM. */
                                                /*!<0 = Disable (Mask) */
                                                /*!<1 = Enable */
            __IO uint8_t  PIN11_AM       :1;    /*!<[27] Refer to EXIC_PX0_AM. */
                                                /*!<0 = Disable (Mask) */
                                                /*!<1 = Enable */
            __IO uint8_t  PIN12_AM       :1;    /*!<[28] Refer to EXIC_PX0_AM. */
                                                /*!<0 = Disable (Mask) */
                                                /*!<1 = Enable */
            __IO uint8_t  PIN13_AM       :1;    /*!<[29] Refer to EXIC_PX0_AM. */
                                                /*!<0 = Disable (Mask) */
                                                /*!<1 = Enable */
            __IO uint8_t  PIN14_AM       :1;    /*!<[30] Refer to EXIC_PX0_AM. */
                                                /*!<0 = Disable (Mask) */
                                                /*!<1 = Enable */
            __IO uint8_t  PIN15_AM       :1;    /*!<[31] Refer to EXIC_PX0_AM. */
                                                /*!<0 = Disable (Mask) */
                                                /*!<1 = Enable    */
                                        
        }MBIT;                                  
    }MSK;                                       /*!< PX_MSK     ~ Offset[0x28]  EXIC PX AOI Mask register */
}EXIC_PX_Struct;

/**
 ******************************************************************************
 *
 * @name        EXIC_PX  [Base Address/Type]
 *
 ******************************************************************************
 */
///@{
#define EXIC_PA_Base    ((uint32_t)(0x50000000+0x20))   /*!< EXIC PA Register Control Definitions base address*/
#define EXIC_PC_Base    ((uint32_t)(0x50000000+0x40))   /*!< EXIC PC Register Control Definitions bass address*/

#define EXIC_PA         ((EXIC_PX_Struct*) EXIC_PA_Base)    /*!< EXIC PA Register Control Definitions */
#define EXIC_PC         ((EXIC_PX_Struct*) EXIC_PC_Base)    /*!< EXIC PC Register Control Definitions */
///@}


#endif  // _MG32__ExtraStruct_H

/*----------------------------------------------------------------------------*/
/*                      End of file MG32__ExtraStruct.h                       */
/*----------------------------------------------------------------------------*/
