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MG32L003 Standard Peripherals Firmware Library
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Macros | |
| #define | PCA_CLOCK_SOURCE_PCLKDIV32 0x00000000U |
| #define | PCA_CLOCK_SOURCE_PCLKDIV16 (PCA_MOD_CPS_0) |
| #define | PCA_CLOCK_SOURCE_PCLKDIV8 (PCA_MOD_CPS_1) |
| #define | PCA_CLOCK_SOURCE_PCLKDIV4 (PCA_MOD_CPS_1 | PCA_MOD_CPS_0) |
| #define | PCA_CLOCK_SOURCE_PCLKDIV2 (PCA_MOD_CPS_2) |
| #define | PCA_CLOCK_SOURCE_TIM10_OVERFLOW (PCA_MOD_CPS_2 | PCA_MOD_CPS_0) |
| #define | PCA_CLOCK_SOURCE_TIM11_OVERFLOW (PCA_MOD_CPS_2 | PCA_MOD_CPS_1) |
| #define | PCA_CLOCK_SOURCE_ECI (PCA_MOD_CPS_2 | PCA_MOD_CPS_1 | PCA_MOD_CPS_0) |
| #define | IS_PCA_CLOCK_COURCE(CLOCK_SOURCE) |
| #define IS_PCA_CLOCK_COURCE | ( | CLOCK_SOURCE | ) |
| #define PCA_CLOCK_SOURCE_ECI (PCA_MOD_CPS_2 | PCA_MOD_CPS_1 | PCA_MOD_CPS_0) |
Specify ECI as pca input clock source
| #define PCA_CLOCK_SOURCE_PCLKDIV16 (PCA_MOD_CPS_0) |
Specify PCLK divider 16 as pca input clock source
| #define PCA_CLOCK_SOURCE_PCLKDIV2 (PCA_MOD_CPS_2) |
Specify PCLK divider 2 as pca input clock source
| #define PCA_CLOCK_SOURCE_PCLKDIV32 0x00000000U |
Specify PCLK divider 32 as pca input clock source
| #define PCA_CLOCK_SOURCE_PCLKDIV4 (PCA_MOD_CPS_1 | PCA_MOD_CPS_0) |
Specify PCLK divider 4 as pca input clock source
| #define PCA_CLOCK_SOURCE_PCLKDIV8 (PCA_MOD_CPS_1) |
Specify PCLK divider 8 as pca input clock source
| #define PCA_CLOCK_SOURCE_TIM10_OVERFLOW (PCA_MOD_CPS_2 | PCA_MOD_CPS_0) |
Specify TIM10 overflow as pca input clock source
| #define PCA_CLOCK_SOURCE_TIM11_OVERFLOW (PCA_MOD_CPS_2 | PCA_MOD_CPS_1) |
Specify TIM11 overflow as pca input clock source