MG32F10x Standard Peripherals Firmware Library
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*************** (C) COPYRIGHT 2020 - 2023 megawin Technology *************** * @file TIM/TIM_DMA/readme.txt * @author megawin Application Team * @version V0.1.10 * @date 05-January-2023 * @brief Description of the TIM_DMA example. ****************************************************************************** * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE * TIME. AS A RESULT, MEGAWIN SHALL NOT BE HELD LIABLE FOR ANY DIRECT, * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM * THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. ******************************************************************************
This example describes how to use DMA and TIM1 update request to transfer data from memory to TIM1->CCR2.
The system clock works at 96Mhz and is generated through PLL configuration. The PLL clock source is an external 8Mhz crystal oscillator. The frequency division ratio of APB1 is 1, and the frequency division ratio of APB2 is 1.
TIM1CLK = SystemCoreClock,Prescaler = 0,TIM1 counter clock = SystemCoreClock。
The objective is to configure TIM1 channel 3 to generate complementary PWM signal with a frequency equal to 375 KHz:
In order to make the program work, you must do the following :
Run the example