◆ MODE
CRC Mode register, Address offset: 0x000
◆ SEED
CRC Seed register, Address offset: 0x004
◆ SUM
CRC Sum register, Address offset: 0x008
◆ WR_DATA_BYTE
__OM uint8_t WR_DATA_BYTE |
CRC Data register for byte, Address offset: 0x008
◆ WR_DATA_HALF_WORD
__OM uint16_t WR_DATA_HALF_WORD |
CRC Data register for half word, Address offset: 0x008
◆ WR_DATA_WORD
__OM uint32_t WR_DATA_WORD |
CRC Data register for word, Address offset: 0x008
The documentation for this struct was generated from the following file: