MG32F10x Standard Peripherals Firmware Library
|
*************** (C) COPYRIGHT 2020 - 2023 megawin Technology *************** * @file TIM/TIM_CascadeSynchro/readme.txt * @author megawin Application Team * @version V0.1.10 * @date 05-January-2023 * @brief Description of the TIM_CascadeSynchro example. ****************************************************************************** * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE * TIME. AS A RESULT, MEGAWIN SHALL NOT BE HELD LIABLE FOR ANY DIRECT, * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM * THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. ******************************************************************************
This example shows how to synchronize TIM peripherals in cascade mode.
In this example three timers are used:
Timers synchronisation in cascade mode:
1/TIM2 is configured as Master Timer:
2/TIM3 is slave for TIM2 and Master for TIM4,
3/TIM4 is slave for TIM3,
In this example, TIMXCLK is fixed at 96MHz, and the TIM2 counter clock is 96MHz.
The main timer TIM2 runs at TIM2 frequency:
TIM2 frequency = (TIM2 counter clock) / (TIM2 period + 1) = 375kHz, duty cycle = TIM2_CCR1 / (TIM2_ARR + 1) = 25%.
TIM3 frequency = (TIM3 counter clock) / (TIM3 period + 1) = 93.75kHz, duty cycle = TIM3_CCR1 / (TIM3_ARR + 1) = 25%.
TIM4 frequency = (TIM4 counter clock) / (TIM4 period + 1) = 23.4375kHz, duty cycle = TIM4_CCR1 / (TIM4_ARR + 1) = 25%.
In order to make the program work, you must do the following :
Run the example