11 #ifndef __MG32F10x_IWDG_H 12 #define __MG32F10x_IWDG_H 40 #define IWDG_WriteAccess_Enable ((uint16_t)0x5555) 41 #define IWDG_WriteAccess_Disable ((uint16_t)0x0000) 42 #define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \ 43 ((ACCESS) == IWDG_WriteAccess_Disable)) 52 #define IWDG_Prescaler_4 ((uint8_t)0x00) 53 #define IWDG_Prescaler_8 ((uint8_t)0x01) 54 #define IWDG_Prescaler_16 ((uint8_t)0x02) 55 #define IWDG_Prescaler_32 ((uint8_t)0x03) 56 #define IWDG_Prescaler_64 ((uint8_t)0x04) 57 #define IWDG_Prescaler_128 ((uint8_t)0x05) 58 #define IWDG_Prescaler_256 ((uint8_t)0x06) 59 #define IS_IWDG_PRESCALER(PRESCALER) (((PRESCALER) == IWDG_Prescaler_4) || \ 60 ((PRESCALER) == IWDG_Prescaler_8) || \ 61 ((PRESCALER) == IWDG_Prescaler_16) || \ 62 ((PRESCALER) == IWDG_Prescaler_32) || \ 63 ((PRESCALER) == IWDG_Prescaler_64) || \ 64 ((PRESCALER) == IWDG_Prescaler_128)|| \ 65 ((PRESCALER) == IWDG_Prescaler_256)) 74 #define IWDG_FLAG_PVU ((uint16_t)0x0001) 75 #define IWDG_FLAG_RVU ((uint16_t)0x0002) 76 #define IS_IWDG_FLAG(FLAG) (((FLAG) == IWDG_FLAG_PVU) || ((FLAG) == IWDG_FLAG_RVU)) 77 #define IS_IWDG_RELOAD(RELOAD) ((RELOAD) <= 0xFFF) void IWDG_SetPrescaler(uint8_t IWDG_Prescaler)
Sets IWDG Prescaler value.
Definition: mg32f10x_iwdg.c:75
void IWDG_Enable(void)
Enables IWDG (write access to IWDG_PR and IWDG_RLR registers disabled).
Definition: mg32f10x_iwdg.c:111
void IWDG_SetReload(uint16_t Reload)
Sets IWDG Reload value.
Definition: mg32f10x_iwdg.c:88
void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess)
Enables or disables write access to IWDG_PR and IWDG_RLR registers.
Definition: mg32f10x_iwdg.c:55
void IWDG_ReloadCounter(void)
Reloads IWDG counter with value defined in the reload register (write access to IWDG_PR and IWDG_RLR ...
Definition: mg32f10x_iwdg.c:101
FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG)
Checks whether the specified IWDG flag is set or not.
Definition: mg32f10x_iwdg.c:124