MG32F10x Standard Peripherals Firmware Library
Macros

Macros

#define UART_INTID_MSI   UART_IIR_INTID_MSI
 
#define UART_INTID_NONE   UART_IIR_INTID_NONE
 
#define UART_INTID_THRE   UART_IIR_INTID_THRE
 
#define UART_INTID_RDA   UART_IIR_INTID_RDA
 
#define UART_INTID_RLS   UART_IIR_INTID_RLS
 
#define UART_INTID_BUSY   UART_IIR_INTID_BUSY
 
#define UART_INTID_CTI   UART_IIR_INTID_CTI
 

Detailed Description

Macro Definition Documentation

◆ UART_INTID_BUSY

#define UART_INTID_BUSY   UART_IIR_INTID_BUSY

Busy detect

◆ UART_INTID_CTI

#define UART_INTID_CTI   UART_IIR_INTID_CTI

character timeout indicator

◆ UART_INTID_MSI

#define UART_INTID_MSI   UART_IIR_INTID_MSI

Modem status interrupt

◆ UART_INTID_NONE

#define UART_INTID_NONE   UART_IIR_INTID_NONE

No interrupt pending

◆ UART_INTID_RDA

#define UART_INTID_RDA   UART_IIR_INTID_RDA

Received data available interrupt

◆ UART_INTID_RLS

#define UART_INTID_RLS   UART_IIR_INTID_RLS

Receiver line status interrupt

◆ UART_INTID_THRE

#define UART_INTID_THRE   UART_IIR_INTID_THRE

Transmitter holding register empty